clk: renesas: r8a779g0: Add PFC/GPIO clocks

Add the module clocks used by the Pin Function Controller (PFC) and
General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4H
(R8A779G0) SoC.

Extracted from a larger patch in the BSP by Kazuya Mizuguchi.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cc6a22f0ad49643e17b9921b27aa9cf0a3b8d57a.1662714852.git.geert+renesas@glider.be

diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
index 77c119c..d40ad40 100644 (file)
--- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
@@ -161,6 +161,10 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
        DEF_MOD("i2c4",         522,    R8A779G0_CLK_S0D6_PER),
        DEF_MOD("i2c5",         523,    R8A779G0_CLK_S0D6_PER),
        DEF_MOD("wdt1:wdt0",    907,    R8A779G0_CLK_R),
+       DEF_MOD("pfc0",         915,    R8A779G0_CLK_CL16M),
+       DEF_MOD("pfc1",         916,    R8A779G0_CLK_CL16M),
+       DEF_MOD("pfc2",         917,    R8A779G0_CLK_CL16M),
+       DEF_MOD("pfc3",         918,    R8A779G0_CLK_CL16M),
 };
 
 /*