sclk_sata, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_uart4,
sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2,
sclk_slimbus, sclk_fimd1, sclk_mipi1, sclk_pcm1, sclk_pcm2, sclk_i2s1,
- sclk_i2s2, sclk_mipihsi,
+ sclk_i2s2, sclk_mipihsi, sclk_mfc,
/* gate clocks */
fimc0 = 256, fimc1, fimc2, fimc3, csis0, csis1, jpeg, smmu_fimc0,
DIV(none, "div_cam1", "mout_cam1", DIV_CAM, 20, 4),
DIV(none, "div_csis0", "mout_csis0", DIV_CAM, 24, 4),
DIV(none, "div_csis1", "mout_csis1", DIV_CAM, 28, 4),
- DIV(none, "div_mfc", "mout_mfc", DIV_MFC, 0, 4),
+ DIV(sclk_mfc, "sclk_mfc", "mout_mfc", DIV_MFC, 0, 4),
DIV(none, "div_g3d", "mout_g3d", DIV_G3D, 0, 4),
DIV(none, "div_fimd0", "mout_fimd0", DIV_LCD0, 0, 4),
DIV(none, "div_mipi0", "mout_mipi0", DIV_LCD0, 16, 4),