The host virglrenderer can only handle moves to integer outputs, all
ALU opt that create integer outputs are created with extra code to convert
to float for the temporaries, and this breaks the output write
handling.
Fixes:
spec@arb_sample_shading@builtin-gl-sample-mask *
spec@arb_sample_shading@builtin-gl-sample-mask-simple *
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15921>
/* virglrenderer doesn't resolve non-float output write properly,
* so we have to first write to a temporary */
- if ((inst->Src[0].Register.File == TGSI_FILE_CONSTANT ||
- inst->Src[0].Register.File == TGSI_FILE_IMMEDIATE) &&
+ if (inst->Instruction.Opcode != TGSI_OPCODE_MOV &&
!tgsi_get_opcode_info(inst->Instruction.Opcode)->is_tex &&
!tgsi_get_opcode_info(inst->Instruction.Opcode)->is_store &&
inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&