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====================================================================================
-Syntax of GFX940 Instructions
+Syntax of gfx940 Instructions
====================================================================================
.. contents::
Introduction
============
-This document describes the syntax of GFX940 instructions.
+This document describes the syntax of gfx940 instructions.
Notation
========
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx940_vdst_c3d63a>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx940_vdst_c3d63a>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx940_vdst_0c37de>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx940_vdst_0c37de>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx940_vdst_c3d63a>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx940_vdst_0c37de>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx940_vdst_63b743>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
- tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx940_vdst_08b5ba>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx940_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx940_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx940_vdst_e2898f>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
+ tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx940_vdst_a32035>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx940_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx940_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx940_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`sc0<amdgpu_synid_sc0>` :ref:`nt<amdgpu_synid_nt>` :ref:`sc1<amdgpu_synid_sc1>`
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_atc_probe :ref:`probe<amdgpu_synid_gfx940_probe>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>`
- s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx940_probe>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>`
- s_atomic_add :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_and :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b32x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b64x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_dec :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_inc :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_or :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_sub :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_swap :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_xor :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b32x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b64x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx940_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx940_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx940_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx940_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx940_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx940_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx940_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_f33c5c>` :ref:`glc<amdgpu_synid_glc>`
- s_dcache_discard :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>`
- s_dcache_discard_x2 :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>`
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ s_atc_probe :ref:`probe<amdgpu_synid_gfx940_probe>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
+ s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx940_probe>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>`
+ s_atomic_add :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_and :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b32x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b64x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_dec :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_inc :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_or :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_sub :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_swap :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_xor :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b32x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`b64x2<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`i64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u32<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`::ref:`u64<amdgpu_synid_gfx940_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx940_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx940_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx940_dst_95761f>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx940_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx940_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx940_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx940_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx940_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx940_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx940_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_dcache_discard :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
+ s_dcache_discard_x2 :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
s_dcache_inv
s_dcache_inv_vol
s_dcache_wb
s_dcache_wb_vol
- s_load_dword :ref:`sdst<amdgpu_synid_gfx940_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx940_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx940_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx940_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dword :ref:`sdst<amdgpu_synid_gfx940_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx940_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx940_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx940_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
s_memrealtime :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`::ref:`b64<amdgpu_synid_gfx940_type_deviation>`
s_memtime :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`::ref:`b64<amdgpu_synid_gfx940_type_deviation>`
- s_scratch_load_dword :ref:`sdst<amdgpu_synid_gfx940_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx940_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_store_dword :ref:`sdata<amdgpu_synid_gfx940_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx940_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx940_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dword :ref:`sdata<amdgpu_synid_gfx940_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx940_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx940_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_7b8c50>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_load_dword :ref:`sdst<amdgpu_synid_gfx940_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx940_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx940_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_store_dword :ref:`sdata<amdgpu_synid_gfx940_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx940_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx940_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dword :ref:`sdata<amdgpu_synid_gfx940_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx940_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx940_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx940_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
SOP1
----
gfx940_simm32_a3e80c
gfx940_simm32_be0c1c
gfx940_soffset_4318ca
- gfx940_soffset_7b8c50
- gfx940_soffset_f33c5c
+ gfx940_soffset_8a17c8
+ gfx940_soffset_ba92ce
gfx940_src_4de5c6
gfx940_src_56ed80
gfx940_src_64ea89
gfx940_vdata_be4895
gfx940_vdata_c8a58b
gfx940_vdata_cfb402
- gfx940_vdst_08b5ba
- gfx940_vdst_0c37de
gfx940_vdst_0f48d1
gfx940_vdst_180bef
gfx940_vdst_260aca
gfx940_vdst_5258b4
gfx940_vdst_56baf6
- gfx940_vdst_63b743
gfx940_vdst_69a144
gfx940_vdst_78dd0a
gfx940_vdst_89680f
gfx940_vdst_a32035
gfx940_vdst_bce42a
gfx940_vdst_bdb32f
- gfx940_vdst_c3d63a
gfx940_vdst_c8d317
gfx940_vdst_d0c0cb
gfx940_vdst_d6f4bd