Add board code for R8A779G0 V4H White Hawk board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
dtb-$(CONFIG_RCAR_GEN4) += \
r8a779a0-falcon-u-boot.dtb \
- r8a779f0-spider-u-boot.dtb
+ r8a779f0-spider-u-boot.dtb \
+ r8a779g0-white-hawk-u-boot.dtb
ifdef CONFIG_RCAR_64
DTC_FLAGS += -R 4 -p 0x1000
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the White Hawk board
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include "r8a779g0-white-hawk.dts"
+#include "r8a779g0-u-boot.dtsi"
+
+/ {
+ aliases {
+ spi0 = &rpc;
+ };
+};
+
+&pfc {
+ qspi0_pins: qspi0 {
+ groups = "qspi0_ctrl", "qspi0_data4";
+ function = "qspi0";
+ };
+};
+
+&rpc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <40000000>;
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25fs512s", "jedec,spi-nor";
+ reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ spi-max-frequency = <40000000>;
+ };
+};
help
Support for Renesas R-Car Gen4 Spider platform
+config TARGET_WHITEHAWK
+ bool "White Hawk board"
+ imply R8A779G0
+ help
+ Support for Renesas R-Car Gen4 White Hawk platform
+
endchoice
source "board/renesas/falcon/Kconfig"
source "board/renesas/spider/Kconfig"
+source "board/renesas/whitehawk/Kconfig"
endif
--- /dev/null
+if TARGET_WHITEHAWK
+
+config SYS_SOC
+ default "rmobile"
+
+config SYS_BOARD
+ default "whitehawk"
+
+config SYS_VENDOR
+ default "renesas"
+
+config SYS_CONFIG_NAME
+ default "whitehawk"
+
+endif
--- /dev/null
+#
+# board/renesas/whitehawk/Makefile
+#
+# Copyright (C) 2021 Renesas Electronics Corp.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := whitehawk.o ../rcar-common/common.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * board/renesas/whitehawk/whitehawk.c
+ * This file is White Hawk board support.
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include <common.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/processor.h>
+#include <linux/errno.h>
+#include <asm/system.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void init_generic_timer(void)
+{
+ const u32 freq = CONFIG_SYS_CLK_FREQ;
+
+ /* Update memory mapped and register based freqency */
+ asm volatile ("msr cntfrq_el0, %0" :: "r" (freq));
+ writel(freq, CNTFID0);
+
+ /* Enable counter */
+ setbits_le32(CNTCR_BASE, CNTCR_EN);
+}
+
+static void init_gic_v3(void)
+{
+ /* GIC v3 power on */
+ writel(BIT(1), GICR_LPI_PWRR);
+
+ /* Wait till the WAKER_CA_BIT changes to 0 */
+ clrbits_le32(GICR_LPI_WAKER, BIT(1));
+ while (readl(GICR_LPI_WAKER) & BIT(2))
+ ;
+
+ writel(0xffffffff, GICR_SGI_BASE + GICR_IGROUPR0);
+}
+
+void s_init(void)
+{
+ if (current_el() == 3)
+ init_generic_timer();
+}
+
+int board_early_init_f(void)
+{
+ /* Unlock CPG access */
+ writel(0x5A5AFFFF, CPGWPR);
+ writel(0xA5A50000, CPGWPCR);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ if (current_el() == 3)
+ init_gic_v3();
+
+ return 0;
+}
+
+void reset_cpu(void)
+{
+ writel(RST_SPRES, RST_SRESCR0);
+}
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_RMOBILE=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xFFFE0000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a779g0-white-hawk-u-boot"
+CONFIG_RCAR_GEN4=y
+CONFIG_TARGET_WHITEHAWK=y
+CONFIG_SYS_CLK_FREQ=16666666
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0x58000000
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BARGSIZE=2048
+CONFIG_REMAKE_ELF=y
+CONFIG_SYS_MONITOR_LEN=1048576
+CONFIG_FIT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779g0-white-hawk.dtb && booti 0x48080000 - 0x48000000"
+CONFIG_DEFAULT_FDT_FILE="r8a779g0-white-hawk.dtb"
+CONFIG_SYS_MALLOC_BOOTPARAMS=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_CBSIZE=2048
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_VERSION_VARIABLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_I2C=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SPANSION=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_RENESAS_RAVB=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_BAUDRATE=921600
+CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * include/configs/whitehawk.h
+ * This file is White Hawk board configuration.
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#ifndef __WHITEHAWK_H
+#define __WHITEHAWK_H
+
+#include "rcar-gen4-common.h"
+
+#endif /* __WHITEHAWK_H */
projects / platform / kernel / u-boot.git / commitdiff