writeb(DAC960_LA_IDB_HWMBOX_ACK_STS, base + DAC960_LA_IDB_OFFSET);
}
-static inline void DAC960_LA_gen_intr(void __iomem *base)
-{
- writeb(DAC960_LA_IDB_GEN_IRQ, base + DAC960_LA_IDB_OFFSET);
-}
-
static inline void DAC960_LA_reset_ctrl(void __iomem *base)
{
writeb(DAC960_LA_IDB_CTRL_RESET, base + DAC960_LA_IDB_OFFSET);
writeb(DAC960_LA_ODB_HWMBOX_ACK_IRQ, base + DAC960_LA_ODB_OFFSET);
}
-static inline void DAC960_LA_ack_mem_mbox_intr(void __iomem *base)
-{
- writeb(DAC960_LA_ODB_MMBOX_ACK_IRQ, base + DAC960_LA_ODB_OFFSET);
-}
-
static inline void DAC960_LA_ack_intr(void __iomem *base)
{
writeb(DAC960_LA_ODB_HWMBOX_ACK_IRQ | DAC960_LA_ODB_MMBOX_ACK_IRQ,
return odb & DAC960_LA_ODB_HWMBOX_STS_AVAIL;
}
-static inline bool DAC960_LA_mem_mbox_status_available(void __iomem *base)
-{
- unsigned char odb = readb(base + DAC960_LA_ODB_OFFSET);
-
- return odb & DAC960_LA_ODB_MMBOX_STS_AVAIL;
-}
-
static inline void DAC960_LA_enable_intr(void __iomem *base)
{
unsigned char odb = 0xFF;
writeb(odb, base + DAC960_LA_IRQMASK_OFFSET);
}
-static inline bool DAC960_LA_intr_enabled(void __iomem *base)
-{
- unsigned char imask = readb(base + DAC960_LA_IRQMASK_OFFSET);
-
- return !(imask & DAC960_LA_IRQMASK_DISABLE_IRQ);
-}
-
static inline void DAC960_LA_write_cmd_mbox(union myrb_cmd_mbox *mem_mbox,
union myrb_cmd_mbox *mbox)
{
writeb(mbox->bytes[12], base + DAC960_LA_MBOX12_OFFSET);
}
-static inline unsigned char DAC960_LA_read_status_cmd_ident(void __iomem *base)
-{
- return readb(base + DAC960_LA_STSID_OFFSET);
-}
-
static inline unsigned short DAC960_LA_read_status(void __iomem *base)
{
return readw(base + DAC960_LA_STS_OFFSET);
writel(DAC960_PG_IDB_HWMBOX_ACK_STS, base + DAC960_PG_IDB_OFFSET);
}
-static inline void DAC960_PG_gen_intr(void __iomem *base)
-{
- writel(DAC960_PG_IDB_GEN_IRQ, base + DAC960_PG_IDB_OFFSET);
-}
-
static inline void DAC960_PG_reset_ctrl(void __iomem *base)
{
writel(DAC960_PG_IDB_CTRL_RESET, base + DAC960_PG_IDB_OFFSET);
writel(DAC960_PG_ODB_HWMBOX_ACK_IRQ, base + DAC960_PG_ODB_OFFSET);
}
-static inline void DAC960_PG_ack_mem_mbox_intr(void __iomem *base)
-{
- writel(DAC960_PG_ODB_MMBOX_ACK_IRQ, base + DAC960_PG_ODB_OFFSET);
-}
-
static inline void DAC960_PG_ack_intr(void __iomem *base)
{
writel(DAC960_PG_ODB_HWMBOX_ACK_IRQ | DAC960_PG_ODB_MMBOX_ACK_IRQ,
return odb & DAC960_PG_ODB_HWMBOX_STS_AVAIL;
}
-static inline bool DAC960_PG_mem_mbox_status_available(void __iomem *base)
-{
- unsigned char odb = readl(base + DAC960_PG_ODB_OFFSET);
-
- return odb & DAC960_PG_ODB_MMBOX_STS_AVAIL;
-}
-
static inline void DAC960_PG_enable_intr(void __iomem *base)
{
unsigned int imask = (unsigned int)-1;
writel(imask, base + DAC960_PG_IRQMASK_OFFSET);
}
-static inline bool DAC960_PG_intr_enabled(void __iomem *base)
-{
- unsigned int imask = readl(base + DAC960_PG_IRQMASK_OFFSET);
-
- return !(imask & DAC960_PG_IRQMASK_DISABLE_IRQ);
-}
-
static inline void DAC960_PG_write_cmd_mbox(union myrb_cmd_mbox *mem_mbox,
union myrb_cmd_mbox *mbox)
{
writeb(mbox->bytes[12], base + DAC960_PG_MBOX12_OFFSET);
}
-static inline unsigned char
-DAC960_PG_read_status_cmd_ident(void __iomem *base)
-{
- return readb(base + DAC960_PG_STSID_OFFSET);
-}
-
static inline unsigned short
DAC960_PG_read_status(void __iomem *base)
{
writeb(DAC960_PD_IDB_HWMBOX_ACK_STS, base + DAC960_PD_IDB_OFFSET);
}
-static inline void DAC960_PD_gen_intr(void __iomem *base)
-{
- writeb(DAC960_PD_IDB_GEN_IRQ, base + DAC960_PD_IDB_OFFSET);
-}
-
static inline void DAC960_PD_reset_ctrl(void __iomem *base)
{
writeb(DAC960_PD_IDB_CTRL_RESET, base + DAC960_PD_IDB_OFFSET);
writeb(0, base + DAC960_PD_IRQEN_OFFSET);
}
-static inline bool DAC960_PD_intr_enabled(void __iomem *base)
-{
- unsigned char imask = readb(base + DAC960_PD_IRQEN_OFFSET);
-
- return imask & DAC960_PD_IRQMASK_ENABLE_IRQ;
-}
-
static inline void DAC960_PD_write_cmd_mbox(void __iomem *base,
union myrb_cmd_mbox *mbox)
{