(const_sint32_operand): Likewise.
* m68k.md (anon mulsi pattern): Use const_int_operand not
const_sint32_operand.
(umulsi3_highpart): Zero extend a constant input.
(smulsi3_highpart): Don't bother checking SImode constant.
(const_umulsi3_highpart): Give op3 DImode.
(const_smulsi3_highpart): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@44252
138bc75d-0d04-0410-961f-
82ee72b054a4
2001-07-22 Richard Henderson <rth@redhat.com>
+ * m68k.c (const_uint32_operand): Abort if mode is <= 32 bits.
+ (const_sint32_operand): Likewise.
+ * m68k.md (anon mulsi pattern): Use const_int_operand not
+ const_sint32_operand.
+ (umulsi3_highpart): Zero extend a constant input.
+ (smulsi3_highpart): Don't bother checking SImode constant.
+ (const_umulsi3_highpart): Give op3 DImode.
+ (const_smulsi3_highpart): Likewise.
+
+2001-07-22 Richard Henderson <rth@redhat.com>
+
* flow.c (split_block): Make sure bb_note is included in the
new block when splitting before a label.
2001-07-20 Catherine Moore <clm@redhat.com>
- * config/v850/v850.md (casesi): Generate LABEL_REF
- with Pmode.
+ * config/v850/v850.md (casesi): Generate LABEL_REF
+ with Pmode.
Fri Jul 20 14:12:57 CEST 2001 Jan Hubicka <jh@suse.cz>
2001-07-20 Aldy Hernandez <aldyh@redhat.com>
- * config/mips/mips.h (ISA_HAS_NMADD_NMSUB): New macro.
+ * config/mips/mips.h (ISA_HAS_NMADD_NMSUB): New macro.
* config/mips/mips.md (nmadd/nmsub): Use macro.
2001-07-19 Catherine Moore <clm@cygnus.com>
- * config/v850/v850.h (ASM_OUTPUT_LABELREF): Restore.
+ * config/v850/v850.h (ASM_OUTPUT_LABELREF): Restore.
2001-07-19 Geoffrey Keating <geoffk@redhat.com>
int
const_uint32_operand (op, mode)
rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+ enum machine_mode mode;
{
+ /* It doesn't make sense to ask this question with a mode that is
+ not larger than 32 bits. */
+ if (GET_MODE_BITSIZE (mode) <= 32)
+ abort ();
+
#if HOST_BITS_PER_WIDE_INT > 32
/* All allowed constants will fit a CONST_INT. */
return (GET_CODE (op) == CONST_INT
int
const_sint32_operand (op, mode)
rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+ enum machine_mode mode;
{
+ /* It doesn't make sense to ask this question with a mode that is
+ not larger than 32 bits. */
+ if (GET_MODE_BITSIZE (mode) <= 32)
+ abort ();
+
/* All allowed constants will fit a CONST_INT. */
return (GET_CODE (op) == CONST_INT
&& (INTVAL (op) >= (-0x7fffffff - 1) && INTVAL (op) <= 0x7fffffff));
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=d")
(mult:SI (match_operand:SI 1 "register_operand" "%0")
- (match_operand:SI 2 "const_sint32_operand" "")))
+ (match_operand:SI 2 "const_int_operand" "n")))
(set (match_operand:SI 3 "register_operand" "=d")
(truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
(match_dup 2))
"
{
operands[3] = gen_reg_rtx (SImode);
- if (GET_CODE (operands[2]) == CONST_INT
- || GET_CODE (operands[2]) == CONST_DOUBLE)
+
+ if (GET_CODE (operands[2]) == CONST_INT)
{
- if (! const_uint32_operand (operands[2], VOIDmode))
- abort ();
+ operands[2] = immed_double_const (INTVAL (operands[2]) & 0xffffffff,
+ 0, DImode);
+
/* We have to adjust the operand order for the matching constraints. */
emit_insn (gen_const_umulsi3_highpart (operands[0], operands[3],
operands[1], operands[2]));
(truncate:SI
(lshiftrt:DI
(mult:DI (zero_extend:DI (match_operand:SI 2 "register_operand" "1"))
- (match_operand 3 "const_uint32_operand" ""))
+ (match_operand:DI 3 "const_uint32_operand" "n"))
(const_int 32))))
(clobber (match_operand:SI 1 "register_operand" "=d"))]
"TARGET_68020 && !TARGET_68060 && !TARGET_5200"
"
{
operands[3] = gen_reg_rtx (SImode);
- if (GET_CODE (operands[2]) == CONST_INT
- || GET_CODE (operands[2]) == CONST_DOUBLE)
+ if (GET_CODE (operands[2]) == CONST_INT)
{
- if (! const_sint32_operand (operands[2], VOIDmode))
- abort ();
/* We have to adjust the operand order for the matching constraints. */
emit_insn (gen_const_smulsi3_highpart (operands[0], operands[3],
operands[1], operands[2]));
(truncate:SI
(lshiftrt:DI
(mult:DI (sign_extend:DI (match_operand:SI 2 "register_operand" "1"))
- (match_operand 3 "const_sint32_operand" ""))
+ (match_operand:DI 3 "const_sint32_operand" "n"))
(const_int 32))))
(clobber (match_operand:SI 1 "register_operand" "=d"))]
"TARGET_68020 && !TARGET_68060 && !TARGET_5200"