unsigned foundErrors;
+ // Avoid querying the MachineFunctionProperties for each operand.
+ bool isFunctionRegBankSelected;
+
typedef SmallVector<unsigned, 16> RegVector;
typedef SmallVector<const uint32_t*, 4> RegMaskVector;
typedef DenseSet<unsigned> RegSet;
TRI = MF.getSubtarget().getRegisterInfo();
MRI = &MF.getRegInfo();
+ isFunctionRegBankSelected = MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::RegBankSelected);
+
LiveVars = nullptr;
LiveInts = nullptr;
LiveStks = nullptr;
report("Generic virtual register must have a size", MO, MONum);
return;
}
- // Make sure the register fits into its register bank if any.
+
const RegisterBank *RegBank = MRI->getRegBankOrNull(Reg);
+
+ // If we're post-RegBankSelect, the gvreg must have a bank.
+ if (!RegBank && isFunctionRegBankSelected) {
+ report("Generic virtual register must have a bank in a "
+ "RegBankSelected function",
+ MO, MONum);
+ return;
+ }
+
+ // Make sure the register fits into its register bank if any.
if (RegBank && RegBank->getSize() < Size) {
report("Register bank is too small for virtual register", MO,
MONum);
--- /dev/null
+# RUN: not llc -mtriple aarch64-- -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+
+ define void @test() { ret void }
+
+...
+---
+# CHECK: *** Bad machine code: Generic virtual register must have a bank in a RegBankSelected function ***
+# CHECK: instruction: %vreg0<def>(64) = COPY
+# CHECK: operand 0: %vreg0<def>
+name: test
+isSSA: true
+regBankSelected: true
+registers:
+ - { id: 0, class: _ }
+body: |
+ bb.0:
+ liveins: %x0
+ %0(64) = COPY %x0
+...