Michal Simek <monstr@monstr.eu>
ML401 MicroBlaze
- XUPV2P MicroBlaze
#########################################################################
# Coldfire Systems: #
LIST_microblaze=" \
ml401 \
suzaku \
- xupv2p \
"
#########################################################################
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
-xupv2p_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) microblaze microblaze xupv2p xilinx
-
#========================================================================
# Blackfin
#========================================================================
rsk7203_config: unconfig
@ >include/config.h
@echo "#define CONFIG_RSK7203 1" >> include/config.h
- @./mkconfig -a $(@:_config=) sh sh2 rsk7203 renesas
+ @$(MKCONFIG) -a $(@:_config=) sh sh2 rsk7203 renesas
#########################################################################
## sh3 (Renesas SuperH)
MigoR_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
- @./mkconfig -a $(@:_config=) sh sh4 MigoR renesas
+ @$(MKCONFIG) -a $(@:_config=) sh sh4 MigoR renesas
ms7750se_config: unconfig
@mkdir -p $(obj)include
/*
- * Copyright (C) 2007
+ * Copyright (C) 2007-2008
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* Copyright (C) 2007
PFC_DRVCR_D: .long 0x0464
FRQCR_D: .long 0x07033639
PLLCR_D: .long 0x00005000
-DLLFRQ_D: .long 0x000004F6 ! 20080115
+DLLFRQ_D: .long 0x000004F6
CMNCR_A: .long CMNCR
-CMNCR_D: .long 0x0000001B ! 20080115
-CS0BCR_A: .long CS0BCR ! Flash bank 1
+CMNCR_D: .long 0x0000001B
+CS0BCR_A: .long CS0BCR
CS0BCR_D: .long 0x24920400
-CS4BCR_A: .long CS4BCR !
-CS4BCR_D: .long 0x10003400 ! 20080115
-CS5ABCR_A: .long CS5ABCR !
+CS4BCR_A: .long CS4BCR
+CS4BCR_D: .long 0x00003400
+CS5ABCR_A: .long CS5ABCR
CS5ABCR_D: .long 0x24920400
-CS5BBCR_A: .long CS5BBCR !
+CS5BBCR_A: .long CS5BBCR
CS5BBCR_D: .long 0x24920400
-CS6ABCR_A: .long CS6ABCR !
+CS6ABCR_A: .long CS6ABCR
CS6ABCR_D: .long 0x24920400
CS0WCR_A: .long CS0WCR
CS0WCR_D: .long 0x00000380
CS4WCR_A: .long CS4WCR
-CS4WCR_D: .long 0x00100A81 ! 20080115
+CS4WCR_D: .long 0x00110080
CS5AWCR_A: .long CS5AWCR
CS5AWCR_D: .long 0x00000300
CS5BWCR_A: .long CS5BWCR
CS6AWCR_D: .long 0x00000300
SDCR_A: .long SBSC_SDCR
-SDCR_D: .long 0x80160809 ! 20080115
+SDCR_D: .long 0x80160809
SDWCR_A: .long SBSC_SDWCR
-SDWCR_D: .long 0x0014450C ! 20080115
+SDWCR_D: .long 0x0014450C
SDPCR_A: .long SBSC_SDPCR
SDPCR_D: .long 0x00000087
RTCOR_A: .long SBSC_RTCOR
RTCNT_A: .long SBSC_RTCNT
RTCNT_D: .long 0xA55A0012
-RTCOR_D: .long 0xA55A001C ! 20080115
+RTCOR_D: .long 0xA55A001C
RTCSR_A: .long SBSC_RTCSR
RFCR_A: .long SBSC_RFCR
RFCR_D: .long 0xA55A0221
-RTCSR_D: .long 0xA55A009a ! 20080115
-SDMR3_A: .long 0xFE581180 ! 20080115
+RTCSR_D: .long 0xA55A009a
+SDMR3_A: .long 0xFE581180
SR_MASK_D: .long 0xEFFFFF0F
SBSCR_D: .word 0x0044
PSCR_D: .word 0x0000
RWTCSR_D_1: .word 0xA507
-RWTCSR_D_2: .word 0xA504 ! 20080115
+RWTCSR_D_2: .word 0xA504
RWTCNT_D: .word 0x5A00
.global lowlevel_init
.text
- .align 2
+ .align 2
lowlevel_init:
mov.l MMUCR_A,r1
mov.l MMUCR_D,r0
- mov.w r0,@r1
+ mov.l r0,@r1
mov.l BCR1_A,r1
mov.l BCR1_D,r0
FRQCR_A: .long FRQCR /* FRQCR Address */
FRQCR_D: .long 0x00000e0a /* 03/07/15 modify */
-BCR1_A: .long BCR1 /* BCR1 Address */
-BCR1_D: .long 0x00180008
-BCR2_A: .long BCR2 /* BCR2 Address */
-BCR2_D: .long 0xabe8
-BCR3_A: .long BCR3 /* BCR3 Address */
-BCR3_D: .long 0x0000
-BCR4_A: .long BCR4 /* BCR4 Address */
-BCR4_D: .long 0x00000010
-WCR1_A: .long WCR1 /* WCR1 Address */
-WCR1_D: .long 0x33343333
-WCR2_A: .long WCR2 /* WCR2 Address */
-WCR2_D: .long 0xcff86fbf
-WCR3_A: .long WCR3 /* WCR3 Address */
-WCR3_D: .long 0x07777707
+BCR1_A: .long BCR1 /* BCR1 Address */
+BCR1_D: .long 0x00180008
+BCR2_A: .long BCR2 /* BCR2 Address */
+BCR2_D: .long 0xabe8
+BCR3_A: .long BCR3 /* BCR3 Address */
+BCR3_D: .long 0x0000
+BCR4_A: .long BCR4 /* BCR4 Address */
+BCR4_D: .long 0x00000010
+WCR1_A: .long WCR1 /* WCR1 Address */
+WCR1_D: .long 0x33343333
+WCR2_A: .long WCR2 /* WCR2 Address */
+WCR2_D: .long 0xcff86fbf
+WCR3_A: .long WCR3 /* WCR3 Address */
+WCR3_D: .long 0x07777707
LED_A: .long 0x04000036 /* LED Address */
RTCNT_A: .long RTCNT /* RTCNT Address */
RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */
RTCOR_A: .long RTCOR /* RTCOR Address */
-RTCOR_D: .long 0xA534 /* RTCOR Write Code */
+RTCOR_D: .long 0xA534 /* RTCOR Write Code */
RTCSR_A: .long RTCSR /* RTCSR Address */
RTCSR_D: .long 0xA510 /* RTCSR Write Code */
-SDMR3_A: .long 0xFF9400CC /* SDMR3 Address */
+SDMR3_A: .long 0xFF9400CC /* SDMR3 Address */
SDMR3_D: .long 0x55
MCR_A: .long MCR /* MCR Address */
-MCR_D1: .long 0x081901F4 /* MRSET:'0' */
-MCR_D2: .long 0x481901F4 /* MRSET:'1' */
-RFCR_A: .long RFCR /* RFCR Address */
-RFCR_D: .long 0xA400 /* RFCR Write Code A4h Data 00h */
+MCR_D1: .long 0x081901F4 /* MRSET:'0' */
+MCR_D2: .long 0x481901F4 /* MRSET:'1' */
+RFCR_A: .long RFCR /* RFCR Address */
+RFCR_D: .long 0xA400 /* RFCR Write Code A4h Data 00h */
PCR_A: .long PCR /* PCR Address */
PCR_D: .long 0x0000
MMUCR_A: .long MMUCR /* MMUCCR Address */
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# (C) Copyright 2007 Michal Simek
-#
-# Michal SIMEK <monstr@monstr.eu>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# CAUTION: This file is automatically generated by libgen.
-# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
-#
-
-TEXT_BASE = 0x38000000
-
-PLATFORM_CPPFLAGS += -mno-xl-soft-mul
-PLATFORM_CPPFLAGS += -mno-xl-soft-div
-PLATFORM_CPPFLAGS += -mxl-barrel-shift
+++ /dev/null
-/*
- * (C) Copyright 2004 Atmark Techno, Inc.
- *
- * Yasushi SHOJI <yashi@atmark-techno.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(microblaze)
-ENTRY(_start)
-
-SECTIONS
-{
- .text ALIGN(0x4):
- {
- __text_start = .;
- cpu/microblaze/start.o (.text)
- *(.text)
- __text_end = .;
- }
-
- .rodata ALIGN(0x4):
- {
- __rodata_start = .;
- *(.rodata)
- __rodata_end = .;
- }
-
- .data ALIGN(0x4):
- {
- __data_start = .;
- *(.data)
- __data_end = .;
- }
-
- .u_boot_cmd ALIGN(0x4):
- {
- . = .;
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- .bss ALIGN(0x4):
- {
- __bss_start = .;
- *(.bss)
- . = ALIGN(4);
- __bss_end = .;
- }
- __end = . ;
-}
+++ /dev/null
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * CAUTION: This file is automatically generated by libgen.
- * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
- */
-
-/* System Clock Frequency */
-#define XILINX_CLOCK_FREQ 100000000
-
-/* Interrupt controller is opb_intc_0 */
-#define XILINX_INTC_BASEADDR 0x41200000
-#define XILINX_INTC_NUM_INTR_INPUTS 11
-
-/* Timer pheriphery is opb_timer_1 */
-#define XILINX_TIMER_BASEADDR 0x41c00000
-#define XILINX_TIMER_IRQ 1
-
-/* Uart pheriphery is RS232_Uart_1 */
-#define XILINX_UARTLITE_BASEADDR 0x40600000
-#define XILINX_UARTLITE_BAUDRATE 115200
-
-/* GPIO is LEDs_4Bit*/
-#define XILINX_GPIO_BASEADDR 0x40000000
-
-/* FLASH doesn't exist none */
-
-/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */
-#define XILINX_RAM_START 0x30000000
-#define XILINX_RAM_SIZE 0x10000000
-
-/* Sysace Controller is SysACE_CompactFlash */
-#define XILINX_SYSACE_BASEADDR 0x41800000
-#define XILINX_SYSACE_HIGHADDR 0x4180ffff
-#define XILINX_SYSACE_MEM_WIDTH 16
-
-/* Ethernet controller is Ethernet_MAC */
-#define XILINX_EMACLITE_BASEADDR 0x40C00000
+++ /dev/null
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* This is a board specific file. It's OK to include board specific
- * header files */
-
-#include <common.h>
-#include <config.h>
-
-void do_reset (void)
-{
-#ifdef CONFIG_SYS_GPIO_0
- *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
- ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
-#endif
-#ifdef CONFIG_SYS_RESET_ADDRESS
- puts ("Reseting board\n");
- asm ("bra r0");
-#endif
-}
-
-int gpio_init (void)
-{
-#ifdef CONFIG_SYS_GPIO_0
- *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0x0;
-#endif
- return 0;
-}
/* Private own data */
static struct ubi_device *ubi;
static char buffer[80];
+static int ubi_initialized;
struct selected_dev {
char dev_name[32]; /* NAND/OneNAND etc */
return err;
}
+ ubi_initialized = 1;
+
return 0;
}
ubi_dev.nr = 0;
/*
+ * Call ubi_exit() before re-initializing the UBI subsystem
+ */
+ if (ubi_initialized) {
+ ubi_exit();
+ del_mtd_partitions(ubi_dev.mtd_info);
+ }
+
+ /*
* Check for nand|onenand selection
*/
#if defined(CONFIG_CMD_NAND)
err = ubi_dev_scan(ubi_dev.mtd_info, ubi_dev.part_name);
if (err) {
printf("UBI init error %d\n", err);
+ ubi_dev.type = DEV_TYPE_NONE;
return err;
}
}
/* E.g., create volume size */
if (argc == 4) {
- addr = simple_strtoul(argv[3], NULL, 16);
+ size = simple_strtoul(argv[3], NULL, 16);
argc--;
}
/* Use maximum available size */
LIB = $(obj)lib$(CPU).a
START = start.o
-OBJS = cpu.o interrupts.o watchdog.o time.o # cache.o
+OBJS = cpu.o interrupts.o watchdog.o
all: .depend $(START) $(LIB)
LIB = $(obj)lib$(CPU).a
SOBJS = start.o
-COBJS = cpu.o interrupts.o watchdog.o time.o cache.o
+COBJS = cpu.o interrupts.o watchdog.o cache.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
+++ /dev/null
-/*
- * (C) Copyright 2007
- * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * (C) Copyright 2007
- * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-
-#define TMU_MAX_COUNTER (~0UL)
-
-static void tmu_timer_start(unsigned int timer)
-{
- if (timer > 2)
- return;
-
- outb(inb(TSTR) | (1 << timer), TSTR);
-}
-
-static void tmu_timer_stop(unsigned int timer)
-{
- u8 val = inb(TSTR);
-
- if (timer > 2)
- return;
- outb(val & ~(1 << timer), TSTR);
-}
-
-int timer_init(void)
-{
- /* Divide clock by 4 */
- outw(0, TCR0);
-
- tmu_timer_stop(0);
- tmu_timer_start(0);
- return 0;
-}
-
-/*
- In theory we should return a true 64bit value (ie something that doesn't
- overflow). However, we don't. Therefore if TMU runs at fastest rate of
- 6.75 MHz this value will wrap after u-boot has been running for approx
- 10 minutes.
-*/
-unsigned long long get_ticks(void)
-{
- return (0 - inl(TCNT0));
-}
-
-unsigned long get_timer(unsigned long base)
-{
- return ((0 - inl(TCNT0)) - base);
-}
-
-void set_timer(unsigned long t)
-{
- outl(0 - t, TCNT0);
-}
-
-void reset_timer(void)
-{
- tmu_timer_stop(0);
- set_timer(0);
- tmu_timer_start(0);
-}
-
-void udelay(unsigned long usec)
-{
- unsigned int start = get_timer(0);
- unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000));
-
- while (get_timer(0) < end)
- continue;
-}
-
-unsigned long get_tbclk(void)
-{
- return CONFIG_SYS_HZ;
-}
LIB = $(obj)lib$(CPU).a
SOBJS = start.o
-COBJS = cpu.o interrupts.o watchdog.o time.o cache.o
+COBJS = cpu.o interrupts.o watchdog.o cache.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
+++ /dev/null
-/*
- * (C) Copyright 2007
- * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#define TMU_MAX_COUNTER (~0UL)
-
-static void tmu_timer_start (unsigned int timer)
-{
- if (timer > 2)
- return;
-
- *((volatile unsigned char *) TSTR) |= (1 << timer);
-}
-
-static void tmu_timer_stop (unsigned int timer)
-{
- u8 val = *((volatile u8 *)TSTR);
- if (timer > 2)
- return;
- *((volatile unsigned char *)TSTR) = val &~(1 << timer);
-}
-
-int timer_init (void)
-{
- /* Divide clock by 4 */
- *(volatile u16 *)TCR0 = 0;
-
- tmu_timer_stop(0);
- tmu_timer_start(0);
- return 0;
-}
-
-/*
- In theory we should return a true 64bit value (ie something that doesn't
- overflow). However, we don't. Therefore if TMU runs at fastest rate of
- 6.75 MHz this value will wrap after u-boot has been running for approx
- 10 minutes.
-*/
-unsigned long long get_ticks (void)
-{
- return (0 - *((volatile u32 *) TCNT0));
-}
-
-unsigned long get_timer (unsigned long base)
-{
- return ((0 - *((volatile u32 *) TCNT0)) - base);
-}
-
-void set_timer (unsigned long t)
-{
- *((volatile unsigned int *) TCNT0) = (0 - t);
-}
-
-void reset_timer (void)
-{
- tmu_timer_stop(0);
- set_timer (0);
- tmu_timer_start(0);
-}
-
-void udelay (unsigned long usec)
-{
- unsigned int start = get_timer (0);
- unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000));
-
- while (get_timer (0) < end)
- continue;
-}
-
-unsigned long get_tbclk (void)
-{
- return CONFIG_SYS_HZ;
-}
#include <linux/mtd/compat.h>
/* Our partition linked list */
-static LIST_HEAD(mtd_partitions);
+struct list_head mtd_partitions;
/* Our partition node structure */
struct mtd_part {
u_int32_t cur_offset = 0;
int i;
+ /*
+ * Need to init the list here, since LIST_INIT() does not
+ * work on platforms where relocation has problems (like MIPS
+ * & PPC).
+ */
+ if (mtd_partitions.next == NULL)
+ INIT_LIST_HEAD(&mtd_partitions);
+
printk (KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name);
for (i = 0; i < nbparts; i++) {
if (err)
goto out_free;
+ err = -ENOMEM;
ubi->peb_buf1 = vmalloc(ubi->peb_size);
if (!ubi->peb_buf1)
goto out_free;
ubi->peb_buf2 = vmalloc(ubi->peb_size);
if (!ubi->peb_buf2)
- goto out_free;
+ goto out_free;
#ifdef CONFIG_MTD_UBI_DEBUG
mutex_init(&ubi->dbg_buf_mutex);
ubi->dbg_peb_buf = vmalloc(ubi->peb_size);
if (!ubi->dbg_peb_buf)
- goto out_free;
+ goto out_free;
#endif
err = attach_by_scanning(ubi);
misc_deregister(&ubi_ctrl_cdev);
class_remove_file(ubi_class, &ubi_version);
class_destroy(ubi_class);
+ mtd_devs = 0;
}
module_exit(ubi_exit);
/* Copy BSC registers into PCI BSC */
p4_out(inl(SH7751_BCR1), SH7751_PCIBCR1);
- p4_out(inl(SH7751_BCR2), SH7751_PCIBCR2);
- p4_out(inl(SH7751_BCR3), SH7751_PCIBCR3);
+ p4_out(inw(SH7751_BCR2), SH7751_PCIBCR2);
+ p4_out(inw(SH7751_BCR3), SH7751_PCIBCR3);
p4_out(inl(SH7751_WCR1), SH7751_PCIWCR1);
p4_out(inl(SH7751_WCR2), SH7751_PCIWCR2);
p4_out(inl(SH7751_WCR3), SH7751_PCIWCR3);
# define LSR_ORER 1
# define FIFOLEVEL_MASK 0x1F
#elif defined(CONFIG_CPU_SH7720)
-# define SCLSR (vu_short *)(SCIF_BASE + 0x24)
+# define SCLSR SCFSR
# define LSR_ORER 0x0200
# define FIFOLEVEL_MASK 0x1F
#elif defined(CONFIG_CPU_SH7710) || \
#define CCR_CACHE_ICI 0x00000800
#define CACHE_OC_ADDRESS_ARRAY 0xf4000000
+
+#if defined (CONFIG_CPU_SH7750) || \
+ defined(CONFIG_CPU_SH7751)
#define CACHE_OC_WAY_SHIFT 14
#define CACHE_OC_NUM_ENTRIES 512
+#else
+#define CACHE_OC_WAY_SHIFT 13
+#define CACHE_OC_NUM_ENTRIES 256
+#endif
#define CACHE_OC_ENTRY_SHIFT 5
#if defined (CONFIG_CPU_SH7750) || \
#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
-#else
-#ifdef XILINX_UART16550_BASEADDR
-#define CONFIG_SYS_NS16550
+#elif XILINX_UART16550_BASEADDR
+#define CONFIG_SYS_NS16550 1
#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 4
+#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR
+#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
-#endif
+
+/* The following table includes the supported baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+#else
+#error Undefined uart
#endif
/* setting reset address */
"1m(romfs),1m(cramfs),-(jffs2)\0"
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_OF_LIBFDT 1
#endif /* __CONFIG_H */
#define CONFIG_MS7722SE 1
#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_ENV
#define CONFIG_BAUDRATE 115200
+++ /dev/null
-/*
- * (C) Copyright 2007-2008 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include "../board/xilinx/xupv2p/xparameters.h"
-
-#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
-#define CONFIG_XUPV2P 1
-
-/* uart */
-#ifdef XILINX_UARTLITE_BASEADDR
-#define CONFIG_XILINX_UARTLITE
-#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
-#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
-#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
-#else
-#ifdef XILINX_UART16550_BASEADDR
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 4
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR
-#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
-#endif
-#endif
-
-/*
- * setting reset address
- *
- * TEXT_BASE is set to place, where the U-BOOT run in RAM, but
- * if you want to store U-BOOT in flash, set CONFIG_SYS_RESET_ADDRESS
- * to FLASH memory and after loading bitstream jump to FLASH.
- * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
- * jump to CONFIG_SYS_RESET_ADDRESS where is the original U-BOOT code.
- */
-/* #define CONFIG_SYS_RESET_ADDRESS 0x36000000 */
-
-/* ethernet */
-#ifdef XILINX_EMAC_BASEADDR
-#define CONFIG_XILINX_EMAC 1
-#define CONFIG_SYS_ENET
-#else
-#ifdef XILINX_EMACLITE_BASEADDR
-#define CONFIG_XILINX_EMACLITE 1
-#define CONFIG_SYS_ENET
-#endif
-#endif
-#undef ET_DEBUG
-
-/* gpio */
-#ifdef XILINX_GPIO_BASEADDR
-#define CONFIG_SYS_GPIO_0 1
-#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
-#endif
-
-/* interrupt controller */
-#ifdef XILINX_INTC_BASEADDR
-#define CONFIG_SYS_INTC_0 1
-#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
-#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
-#endif
-
-/* timer */
-#ifdef XILINX_TIMER_BASEADDR
-#if (XILINX_TIMER_IRQ != -1)
-#define CONFIG_SYS_TIMER_0 1
-#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
-#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
-#define FREQUENCE XILINX_CLOCK_FREQ
-#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
-#endif
-#else
-#ifdef XILINX_CLOCK_FREQ
-#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
-#else
-#error BAD CLOCK FREQ
-#endif
-#endif
-/*
- * memory layout - Example
- * TEXT_BASE = 0x3600_0000;
- * CONFIG_SYS_SRAM_BASE = 0x3000_0000;
- * CONFIG_SYS_SRAM_SIZE = 0x1000_0000;
- *
- * CONFIG_SYS_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000
- * CONFIG_SYS_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000
- * CONFIG_SYS_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000
- *
- * 0x3000_0000 CONFIG_SYS_SDRAM_BASE
- * FREE
- * 0x3600_0000 TEXT_BASE
- * U-BOOT code
- * 0x3602_0000
- * FREE
- *
- * STACK
- * 0x3FF7_F000 CONFIG_SYS_MALLOC_BASE
- * MALLOC_AREA 256kB Alloc
- * 0x3FFB_F000 CONFIG_SYS_MONITOR_BASE
- * MONITOR_CODE 256kB Env
- * 0x3FFF_F000 CONFIG_SYS_GBL_DATA_OFFSET
- * GLOBAL_DATA 4kB bd, gd
- * 0x4000_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
- */
-
-/* ddr sdram - main memory */
-#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
-#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
-
-/* global pointer */
-#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) /* start of global data */
-
-/* monitor code */
-#define SIZE 0x40000
-#define CONFIG_SYS_MONITOR_LEN SIZE
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_MALLOC_LEN SIZE
-#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-
-/* stack */
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE
-
-#define CONFIG_SYS_NO_FLASH 1
-#define CONFIG_ENV_IS_NOWHERE 1
-#define CONFIG_ENV_SIZE 0x1000
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_JFFS2
-#undef CONFIG_CMD_IMLS
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_IRQ
-
-#ifndef CONFIG_SYS_ENET
- #undef CONFIG_CMD_NET
-#else
- #define CONFIG_CMD_PING
-#endif
-
-#ifdef XILINX_SYSACE_BASEADDR
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
-#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
-#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
-
-#define CONFIG_BOOTDELAY 30
-#define CONFIG_BOOTARGS "root=romfs"
-#define CONFIG_HOSTNAME "xupv2p"
-#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
-#define CONFIG_IPADDR 192.168.0.3
-#define CONFIG_SERVERIP 192.168.0.5
-#define CONFIG_GATEWAYIP 192.168.0.1
-#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
-
-/* architecture dependent code */
-#define CONFIG_SYS_USR_EXCEP /* user exception */
-#define CONFIG_SYS_HZ 1000
-
-#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \
- "base 0;" \
- "echo"
-
-/* system ace */
-#ifdef XILINX_SYSACE_BASEADDR
-#define CONFIG_SYSTEMACE
-/* #define DEBUG_SYSTEMACE */
-#define SYSTEMACE_CONFIG_FPGA
-#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
-#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
-#define CONFIG_DOS_PARTITION
-#endif
-
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_OF_LIBFDT 1 /* flat device tree */
-
-#endif /* __CONFIG_H */
/* functions */
extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp);
extern int ubi_init(void);
+extern void ubi_exit(void);
extern struct ubi_device *ubi_devices[];
bd->bi_baudrate = CONFIG_BAUDRATE;
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+ gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
/* Initialise malloc() area */
mem_malloc_init ();
COBJS-y += board.o
COBJS-y += bootm.o
-# COBJS-y += time.o
+ifeq ($(CONFIG_SH2),y)
+COBJS-y += time_sh2.o
+else
+COBJS-y += time.o
+endif
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
/*
- * Copyright (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * (C) Copyright 2007-2008
+ * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
+
+#define TMU_MAX_COUNTER (~0UL)
+static int clk_adj = 1;
static void tmu_timer_start (unsigned int timer)
{
if (timer > 2)
return;
+ writeb(readb(TSTR) | (1 << timer), TSTR);
+}
- *((volatile unsigned char *) TSTR0) |= (1 << timer);
+static void tmu_timer_stop (unsigned int timer)
+{
+ if (timer > 2)
+ return;
+ writeb(readb(TSTR) & ~(1 << timer), TSTR);
}
int timer_init (void)
{
- *(volatile u16 *)TCR0 = 0;
+ /* Divide clock by TMU_CLK_DIVIDER */
+ u16 bit = 0;
+ switch( TMU_CLK_DIVIDER ){
+ case 4:
+ bit = 0;
+ break;
+ case 16:
+ bit = 1;
+ break;
+ case 64: bit = 2;
+ break;
+ case 256:
+ bit = 3;
+ break;
+ case 1024:
+ bit = 4;
+ break;
+ default:
+ bit = 0;
+ break;
+ }
+ writew(readw(TCR0) | bit, TCR0);
+
+ /* Clock adjustment calc */
+ clk_adj = (int)(1.0/((1.0/CONFIG_SYS_HZ)*1000000));
+ if (clk_adj < 1)
+ clk_adj = 1;
+
+ tmu_timer_stop(0);
+ tmu_timer_start(0);
- tmu_timer_start (0);
return 0;
}
unsigned long long get_ticks (void)
{
- return (0 - *((volatile unsigned int *) TCNT0));
+ return 0 - readl(TCNT0);
}
-unsigned long get_timer (unsigned long base)
+static unsigned long get_usec (void)
{
- return ((0 - *((volatile unsigned int *) TCNT0)) - base);
+ return (0 - readl(TCNT0));
}
-void set_timer (unsigned long t)
+void udelay (unsigned long usec)
{
- *((volatile unsigned int *) TCNT0) = (0 - t);
+ unsigned int start = get_usec();
+ unsigned int end = start + (usec * clk_adj);
+
+ while (get_usec() < end)
+ continue;
}
-void reset_timer (void)
+unsigned long get_timer (unsigned long base)
{
- set_timer (0);
+ /* return msec */
+ return ((get_usec()/clk_adj)/1000) - base;
}
-void udelay (unsigned long usec)
+void set_timer (unsigned long t)
{
- unsigned int start = get_timer (0);
- unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000));
+ writel((0 - t), TCNT0);
+}
- while (get_timer (0) < end)
- continue;
+void reset_timer (void)
+{
+ tmu_timer_stop(0);
+ set_timer (0);
+ tmu_timer_start(0);
}
unsigned long get_tbclk (void)
return cmt0_timer;
}
-static vu_long cmcnt;
-ulong get_timer(ulong base)
+static vu_long cmcnt = 0;
+static unsigned long get_usec (void)
{
ulong data = readw(CMCNT_0);
cmt0_timer += cmcnt;
cmcnt = data;
- return cmt0_timer - base;
+ return cmt0_timer;
+}
+
+/* return msec */
+ulong get_timer(ulong base)
+{
+ return (get_usec()/1000) - base;
}
void set_timer(ulong t)
void udelay(unsigned long usec)
{
- unsigned int start = get_timer(0);
+ unsigned long end = get_usec() + usec;
- while (get_timer((ulong) start) < (usec * (CONFIG_SYS_HZ / 1000000)))
+ while (get_usec() < end)
continue;
}
projects / kernel / u-boot.git / commitdiff