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[MIPS] Fix uniprocessor Sibyte builds.
author
Andrew Sharp
<tigerand@gmail.com>
Sat, 10 Feb 2007 01:35:28 +0000
(17:35 -0800)
committer
Ralf Baechle
<ralf@linux-mips.org>
Tue, 13 Feb 2007 22:40:51 +0000
(22:40 +0000)
Signed-off-by: Andrew Sharp <tigerand@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/c-sb1.c
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diff --git
a/arch/mips/mm/c-sb1.c
b/arch/mips/mm/c-sb1.c
index
3a8afd4
..
9ea460b
100644
(file)
--- a/
arch/mips/mm/c-sb1.c
+++ b/
arch/mips/mm/c-sb1.c
@@
-259,6
+259,12
@@
static void sb1_flush_cache_data_page(unsigned long addr)
on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1);
}
#else
+
+static void local_sb1_flush_cache_data_page(unsigned long addr)
+{
+ __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
+}
+
void sb1_flush_cache_data_page(unsigned long)
__attribute__((alias("local_sb1_flush_cache_data_page")));
#endif