2007-02-17 Thiemo Seufer <ths@mips.com>
authorThiemo Seufer <ths@networkno.de>
Sat, 17 Feb 2007 01:26:48 +0000 (01:26 +0000)
committerThiemo Seufer <ths@networkno.de>
Sat, 17 Feb 2007 01:26:48 +0000 (01:26 +0000)
[ sim/mips/ChangeLog ]
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add mdmx to sim_igen_machine.
(mipsisa64*-*-*): Likewise. Remove dsp.
(mipsisa32*-*-*): Remove dsp.
* configure: Regenerate.

[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Add case for mips*-sde-elf*.
(mdmxmodels): Run mdmx tests only on mdmx capable configurations.

sim/mips/ChangeLog
sim/mips/configure
sim/mips/configure.ac
sim/testsuite/sim/mips/ChangeLog
sim/testsuite/sim/mips/basic.exp

index bd4fb33..f6771d4 100644 (file)
@@ -1,3 +1,11 @@
+2007-02-17  Thiemo Seufer  <ths@mips.com>
+
+       * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
+       Add mdmx to sim_igen_machine.
+       (mipsisa64*-*-*): Likewise. Remove dsp.
+       (mipsisa32*-*-*): Remove dsp.
+       * configure: Regenerate.
+
 2007-02-13  Thiemo Seufer  <ths@mips.com>
 
        * configure.ac: Add mips*-sde-elf* target.
index 529eb52..2ddf7fc 100755 (executable)
@@ -5131,7 +5131,7 @@ case "${target}" in
                        sim_multi_default=mips5000
                        ;;
   mips*-sde-elf*)      sim_gen=M16
-                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp,smartmips"
+                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,smartmips"
                        sim_m16_machine="-M mips16,mips16e,mips64r2"
                        sim_igen_filter="32,64,f"
                        sim_mach_default="mipsisa64r2"
@@ -5144,19 +5144,19 @@ case "${target}" in
                        sim_m16_filter="16"
                        ;;
   mipsisa32r2*-*-*)    sim_gen=M16
-                       sim_igen_machine="-M mips32r2,mips16,mips16e,dsp,smartmips"
+                       sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,smartmips"
                        sim_m16_machine="-M mips16,mips16e,mips32r2"
                        sim_igen_filter="32,f"
                        sim_mach_default="mipsisa32r2"
                        ;;
   mipsisa32*-*-*)      sim_gen=M16
-                       sim_igen_machine="-M mips32,mips16,mips16e,dsp,smartmips"
+                       sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
                        sim_m16_machine="-M mips16,mips16e,mips32"
                        sim_igen_filter="32,f"
                        sim_mach_default="mipsisa32"
                        ;;
   mipsisa64r2*-*-*)    sim_gen=M16
-                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp"
+                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp"
                        sim_m16_machine="-M mips16,mips16e,mips64r2"
                        sim_igen_filter="32,64,f"
                        sim_mach_default="mipsisa64r2"
@@ -5167,7 +5167,7 @@ case "${target}" in
                        sim_mach_default="mips_sb1"
                        ;;
   mipsisa64*-*-*)      sim_gen=M16
-                       sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp"
+                       sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
                        sim_m16_machine="-M mips16,mips16e,mips64"
                        sim_igen_filter="32,64,f"
                        sim_mach_default="mipsisa64"
index 3bdafff..b0d5416 100644 (file)
@@ -141,6 +141,12 @@ case "${target}" in
                          vr5500:mipsIV,vr5500:32,64,f:mips5500"
                        sim_multi_default=mips5000
                        ;;
+  mips*-sde-elf*)      sim_gen=M16
+                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,smartmips"
+                       sim_m16_machine="-M mips16,mips16e,mips64r2"
+                       sim_igen_filter="32,64,f"
+                       sim_mach_default="mipsisa64r2"
+                       ;;
   mips64*-*-*)         sim_igen_filter="32,64,f"
                        sim_gen=IGEN
                        ;;
@@ -148,26 +154,20 @@ case "${target}" in
                        sim_igen_filter="32,64,f"
                        sim_m16_filter="16"
                        ;;
-  mips*-sde-elf*)      sim_gen=M16
-                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp,smartmips"
-                       sim_m16_machine="-M mips16,mips16e,mips64r2"
-                       sim_igen_filter="32,64,f"
-                       sim_mach_default="mipsisa64r2"
-                       ;;
   mipsisa32r2*-*-*)    sim_gen=M16
-                       sim_igen_machine="-M mips32r2,mips16,mips16e,dsp,smartmips"
+                       sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,smartmips"
                        sim_m16_machine="-M mips16,mips16e,mips32r2"
                        sim_igen_filter="32,f"
                        sim_mach_default="mipsisa32r2"
                        ;;
   mipsisa32*-*-*)      sim_gen=M16
-                       sim_igen_machine="-M mips32,mips16,mips16e,dsp,smartmips"
+                       sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
                        sim_m16_machine="-M mips16,mips16e,mips32"
                        sim_igen_filter="32,f"
                        sim_mach_default="mipsisa32"
                        ;;
   mipsisa64r2*-*-*)    sim_gen=M16
-                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp"
+                       sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp"
                        sim_m16_machine="-M mips16,mips16e,mips64r2"
                        sim_igen_filter="32,64,f"
                        sim_mach_default="mipsisa64r2"
@@ -178,7 +178,7 @@ case "${target}" in
                        sim_mach_default="mips_sb1"
                        ;;
   mipsisa64*-*-*)      sim_gen=M16
-                       sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp"
+                       sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
                        sim_m16_machine="-M mips16,mips16e,mips64"
                        sim_igen_filter="32,64,f"
                        sim_mach_default="mipsisa64"
index 6720917..a7e2c0d 100644 (file)
@@ -1,3 +1,8 @@
+2007-02-17  Thiemo Seufer  <ths@mips.com>
+
+       * basic.exp: Add case for mips*-sde-elf*.
+       (mdmxmodels): Run mdmx tests only on mdmx capable configurations.
+
 2007-02-13  Thiemo Seufer  <ths@mips.com>
 
        * mips32-dsp.s: Run DSP testcase only for release 2 architecture.
index 00f77c2..31f5258 100644 (file)
@@ -37,18 +37,27 @@ proc run_hilo_test {testfile models nops} {
 if {[istarget mips*-*-elf] && [board_info target exists is_simulator]} {
 
     set dspmodels ""
+    set mdmxmodels ""
 
     if {[istarget mipsisa64sb1*-*-elf]} {
        set models "sb1"
        set submodels "mips1 mips2 mips3 mips4 mips32 mips64"
+       append mdmxmodels " mips64"
     } elseif {[istarget mipsisa64*-*-elf]} {
        set models "mips32 mips64 mips32r2 mips64r2"
        set submodels "mips1 mips2 mips3 mips4"
        append dspmodels " mips32r2 mips64r2"
+       append mdmxmodels " mips64 mips32r2 mips64r2"
+    } elseif {[istarget mips*-sde-elf*]} {
+       set models "mips32 mips64 mips32r2 mips64r2"
+       set submodels ""
+       append dspmodels " mips32r2 mips64r2"
+       append mdmxmodels " mips64 mips32r2 mips64r2"
     } elseif {[istarget mipsisa32*-*-elf]} {
        set models "mips32 mips32r2"
        set submodels "mips1 mips2"
        append dspmodels " mips32r2"
+       append mdmxmodels " mips32r2"
     } elseif {[istarget mips64vr*-*-elf]} {
        set models "vr4100 vr4111 vr4120 vr5000 vr5400 vr5500"
        set submodels "mips1 mips2 mips3 mips4"
@@ -73,8 +82,8 @@ if {[istarget mips*-*-elf] && [board_info target exists is_simulator]} {
     run_sim_test fpu64-ps.s $submodels
     run_sim_test fpu64-ps-sb1.s $submodels
 
-    run_sim_test mdmx-ob.s $submodels
-    run_sim_test mdmx-ob-sb1.s $submodels
+    run_sim_test mdmx-ob.s $mdmxmodels
+    run_sim_test mdmx-ob-sb1.s $mdmxmodels
 
     run_sim_test mips32-dsp.s $dspmodels
 }