Force chain 1 to be used for CCK rates since the target power
table stored in EEPROM is too high to transmit with both chains.
This is needed to avoid regulatory violation.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
#define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
+#define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
+
#define ATH_TX_COMPLETE_POLL_INT 1000
enum ATH_AGGR_STATUS {
{
struct ath_hw *ah = sc->sc_ah;
struct ath9k_channel *curchan = ah->curchan;
+
if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) &&
(curchan->channelFlags & CHANNEL_5GHZ) &&
(chainmask == 0x7) && (rate < 0x90))
return 0x3;
+ else if (AR_SREV_9462(ah) && ath9k_hw_btcoex_is_enabled(ah) &&
+ IS_CCK_RATE(rate))
+ return 0x2;
else
return chainmask;
}