KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on ITS disable

If an ITS gets disabled, we need to make sure that further interrupts
won't hit in the cache. For that, we invalidate the translation cache
when the ITS is disabled.

Tested-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
index 09a1798208166025c6749643c2994cf908596e06..05406bd92ce90ce618c38579170812adce6d0dc1 100644 (file)
--- a/virt/kvm/arm/vgic/vgic-its.c
+++ b/virt/kvm/arm/vgic/vgic-its.c
@@ -1597,6 +1597,8 @@ static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
                goto out;
 
        its->enabled = !!(val & GITS_CTLR_ENABLE);
+       if (!its->enabled)
+               vgic_its_invalidate_cache(kvm);
 
        /*
         * Try to process any pending commands. This function bails out early