asan.c (asan_emit_stack_protection): Use full-sized mask to align the base address...

	* asan.c (asan_emit_stack_protection): Use full-sized mask to align
	the base address on 64-bit strict-alignment platforms.

From-SVN: r268949

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 96f8679..63d1f41 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,7 +1,11 @@
+2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * asan.c (asan_emit_stack_protection): Use full-sized mask to align
+       the base address on 64-bit strict-alignment platforms.
+
 2019-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 
-       * config/i386/i386.h (VALID_MMX_REG_MODE): Correct the misplaced
-       ')'.
+       * config/i386/i386.h (VALID_MMX_REG_MODE): Correct the misplaced ')'.
 
 2019-02-15  Uroš Bizjak  <ubizjak@gmail.com>
 

diff --git a/gcc/asan.c b/gcc/asan.c
index 65b1247..3b800b2 100644 (file)
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -1440,13 +1440,15 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
        base_align_bias = ((asan_frame_size + alignb - 1)
                           & ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size;
     }
+
   /* Align base if target is STRICT_ALIGNMENT.  */
   if (STRICT_ALIGNMENT)
-    base = expand_binop (Pmode, and_optab, base,
-                        gen_int_mode (-((GET_MODE_ALIGNMENT (SImode)
-                                         << ASAN_SHADOW_SHIFT)
-                                        / BITS_PER_UNIT), Pmode), NULL_RTX,
-                        1, OPTAB_DIRECT);
+    {
+      const HOST_WIDE_INT align
+       = (GET_MODE_ALIGNMENT (SImode) / BITS_PER_UNIT) << ASAN_SHADOW_SHIFT;
+      base = expand_binop (Pmode, and_optab, base, gen_int_mode (-align, Pmode),
+                          NULL_RTX, 1, OPTAB_DIRECT);
+    }
 
   if (use_after_return_class == -1 && pbase)
     emit_move_insn (pbase, base);