if (!DstTy.isVector() || !SrcTy.isVector())
report("G_CONCAT_VECTOR requires vector source and destination operands",
MI);
+
+ if (MI->getNumOperands() < 3)
+ report("G_CONCAT_VECTOR requires at least 2 source operands", MI);
+
for (unsigned i = 2; i < MI->getNumOperands(); ++i) {
if (MRI->getType(MI->getOperand(1).getReg()) !=
MRI->getType(MI->getOperand(i).getReg()))
#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---- |
- target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
- target triple = "aarch64-unknown-unknown"
-
- define i32 @g_concat_vectors() {
- ret i32 0
- }
-
-...
---
name: g_concat_vectors
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
-liveins:
+liveins:
body: |
bb.0:
- ; CHECK: Bad machine code: G_CONCAT_VECTOR num dest and source elements should match
- %0(<2 x s32>) = IMPLICIT_DEF
- %1(<2 x s32>) = IMPLICIT_DEF
+ %0:_(<2 x s32>) = IMPLICIT_DEF
+ %1:_(<2 x s32>) = IMPLICIT_DEF
+
+ ; CHECK: Bad machine code: G_CONCAT_VECTOR num dest and source elements should match
%2:_(<2 x s32>) = G_CONCAT_VECTORS %0, %1
+
+ ; CHECK: Bad machine code: G_CONCAT_VECTOR requires at least 2 source operands
+ %3:_(<2 x s32>) = G_CONCAT_VECTORS %1
+
+ ; CHECK: *** Bad machine code: Explicit definition marked as use ***
+ G_CONCAT_VECTORS %1, %1
+
...