arm64: zynqmp: Wire psgtr for zc1751-xm013
authorMichal Simek <michal.simek@xilinx.com>
Fri, 6 Aug 2021 10:14:23 +0000 (12:14 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 13 Sep 2021 06:55:56 +0000 (08:55 +0200)
Add psgtr description for SATA and USB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c78625f08c16385a4798e0a62d20df7491ac00e.1628244860.git.michal.simek@xilinx.com
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts

index 4394ec3..381cc68 100644 (file)
@@ -11,6 +11,7 @@
 
 #include "zynqmp.dtsi"
 #include "zynqmp-clk-ccf.dtsi"
+#include <dt-bindings/phy/phy.h>
 
 / {
        model = "ZynqMP zc1751-xm017-dc3 RevA";
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
        };
+
+       clock_si5338_2: clk26 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <26000000>;
+       };
+
+       clock_si5338_3: clk125 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <125000000>;
+       };
 };
 
 &fpd_dma_chan1 {
        num-cs = <2>;
 };
 
+&psgtr {
+       status = "okay";
+       /* usb3, sata */
+       clocks = <&clock_si5338_2>, <&clock_si5338_3>;
+       clock-names = "ref2", "ref3";
+};
+
 &rtc {
        status = "okay";
 };
        ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       phy-names = "sata-phy";
+       phys = <&psgtr 2 PHY_TYPE_SATA 0 3>;
 };
 
 &sdhci1 { /* emmc with some settings */
 
 &usb0 {
        status = "okay";
+       phy-names = "usb3-phy";
+       phys = <&psgtr 0 PHY_TYPE_USB3 0 2>;
 };
 
 &dwc3_0 {
 /* ULPI SMSC USB3320 */
 &usb1 {
        status = "okay";
+       phy-names = "usb3-phy";
+       phys = <&psgtr 3 PHY_TYPE_USB3 1 2>;
 };
 
 &dwc3_1 {