arm.md (andsi3): Change to zero extension if possible.
authorWei Guozhi <carrot@google.com>
Thu, 12 Aug 2010 02:03:59 +0000 (02:03 +0000)
committerWei Guozhi <carrot@gcc.gnu.org>
Thu, 12 Aug 2010 02:03:59 +0000 (02:03 +0000)
* config/arm/arm.md (andsi3): Change to zero extension if possible.

* config/arm/thumb2.md (thumb2_zero_extendqisi2_v6): Change the name.

* gcc.target/arm/pr44999.c: New testcase.

From-SVN: r163184

gcc/ChangeLog
gcc/config/arm/arm.md
gcc/config/arm/thumb2.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arm/pr44999.c [new file with mode: 0644]

index 031e7d2..d55ddbe 100644 (file)
@@ -1,3 +1,9 @@
+2010-08-12  Wei Guozhi  <carrot@google.com>
+
+       PR target/44999
+       * config/arm/arm.md (andsi3): Change to zero extension if possible.
+       * config/arm/thumb2.md (thumb2_zero_extendqisi2_v6): Change the name.
+
 2010-08-11  Vladimir Makarov  <vmakarov@redhat.com>
 
        * ira-int.h (ira_remove_allocno_copy_from_list): Remove.
index 78b1710..1506935 100644 (file)
     {
       if (GET_CODE (operands[2]) == CONST_INT)
         {
-          arm_split_constant (AND, SImode, NULL_RTX,
-                             INTVAL (operands[2]), operands[0],
-                             operands[1], optimize && can_create_pseudo_p ());
+         if (INTVAL (operands[2]) == 255 && arm_arch6)
+           {
+             operands[1] = convert_to_mode (QImode, operands[1], 1);
+             emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0],
+                                                        operands[1]));
+           }
+         else
+           arm_split_constant (AND, SImode, NULL_RTX,
+                               INTVAL (operands[2]), operands[0],
+                               operands[1],
+                               optimize && can_create_pseudo_p ());
 
           DONE;
         }
index 46767d4..2e4cfc9 100644 (file)
    (set_attr "neg_pool_range" "*,250")]
 )
 
-(define_insn "*thumb2_zero_extendqisi2_v6"
+(define_insn "thumb2_zero_extendqisi2_v6"
   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
        (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
   "TARGET_THUMB2 && arm_arch6"
index e76af3f..6ac7bba 100644 (file)
@@ -1,3 +1,8 @@
+2010-08-12  Wei Guozhi  <carrot@google.com>
+
+       PR target/44999
+       * gcc.target/arm/pr44999.c: New testcase.
+
 2010-08-12  Jie Zhang  <jie@codesourcery.com>
 
        * gcc.dg/graphite/interchange-9.c (M): Define to be 111.
diff --git a/gcc/testsuite/gcc.target/arm/pr44999.c b/gcc/testsuite/gcc.target/arm/pr44999.c
new file mode 100644 (file)
index 0000000..d07dca1
--- /dev/null
@@ -0,0 +1,9 @@
+/* Use UXTB to extract the lowest byte.  */
+/* { dg-options "-mthumb -Os" } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-final { scan-assembler "uxtb" } } */
+
+int tp(int x, int y)
+{
+  return (x & 0xff) - (y & 0xffff);
+}