],
'arch:arm': [
'arm/assembler-arm.cc', 'arm/builtins-arm.cc', 'arm/cfg-arm.cc',
- 'arm/codegen-arm.cc', 'arm/cpu-arm.cc', 'arm/disasm-arm.cc',
- 'arm/debug-arm.cc', 'arm/frames-arm.cc', 'arm/ic-arm.cc',
- 'arm/jump-target-arm.cc', 'arm/macro-assembler-arm.cc',
+ 'arm/codegen-arm.cc', 'arm/constants-arm.cc', 'arm/cpu-arm.cc',
+ 'arm/disasm-arm.cc', 'arm/debug-arm.cc', 'arm/frames-arm.cc',
+ 'arm/ic-arm.cc', 'arm/jump-target-arm.cc', 'arm/macro-assembler-arm.cc',
'arm/regexp-macro-assembler-arm.cc',
'arm/register-allocator-arm.cc', 'arm/stub-cache-arm.cc',
'arm/virtual-frame-arm.cc'
--- /dev/null
+// Copyright 2009 the V8 project authors. All rights reserved.\r
+// Redistribution and use in source and binary forms, with or without\r
+// modification, are permitted provided that the following conditions are\r
+// met:\r
+//\r
+// * Redistributions of source code must retain the above copyright\r
+// notice, this list of conditions and the following disclaimer.\r
+// * Redistributions in binary form must reproduce the above\r
+// copyright notice, this list of conditions and the following\r
+// disclaimer in the documentation and/or other materials provided\r
+// with the distribution.\r
+// * Neither the name of Google Inc. nor the names of its\r
+// contributors may be used to endorse or promote products derived\r
+// from this software without specific prior written permission.\r
+//\r
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+\r
+#include "v8.h"\r
+\r
+#include "constants-arm.h"\r
+\r
+\r
+namespace assembler {\r
+namespace arm {\r
+\r
+namespace v8i = v8::internal;\r
+\r
+\r
+// These register names are defined in a way to match the native disassembler\r
+// formatting. See for example the command "objdump -d <binary file>".\r
+const char* Registers::names_[kNumRegisters] = {\r
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",\r
+ "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc",\r
+};\r
+\r
+\r
+// List of alias names which can be used when referring to ARM registers.\r
+const Registers::RegisterAlias Registers::aliases_[] = {\r
+ {10, "sl"},\r
+ {11, "r11"},\r
+ {12, "r12"},\r
+ {13, "r13"},\r
+ {14, "r14"},\r
+ {15, "r15"},\r
+ {kNoRegister, NULL}\r
+};\r
+\r
+\r
+const char* Registers::Name(int reg) {\r
+ const char* result;\r
+ if ((0 <= reg) && (reg < kNumRegisters)) {\r
+ result = names_[reg];\r
+ } else {\r
+ result = "noreg";\r
+ }\r
+ return result;\r
+}\r
+\r
+\r
+int Registers::Number(const char* name) {\r
+ // Look through the canonical names.\r
+ for (int i = 0; i < kNumRegisters; i++) {\r
+ if (strcmp(names_[i], name) == 0) {\r
+ return i;\r
+ }\r
+ }\r
+\r
+ // Look through the alias names.\r
+ int i = 0;\r
+ while (aliases_[i].reg != kNoRegister) {\r
+ if (strcmp(aliases_[i].name, name) == 0) {\r
+ return aliases_[i].reg;\r
+ }\r
+ i++;\r
+ }\r
+\r
+ // No register with the reguested name found.\r
+ return kNoRegister;\r
+}\r
+\r
+\r
+} } // namespace assembler::arm\r
namespace assembler {
namespace arm {
+// Number of registers in normal ARM mode.
+static const int kNumRegisters = 16;
+
+// PC is register 15.
+static const int kPCRegister = 15;
+static const int kNoRegister = -1;
+
// Defines constants and accessor classes to assemble, disassemble and
// simulate ARM instructions.
//
};
+// Helper functions for converting between register numbers and names.
+class Registers {
+ public:
+ // Return the name of the register.
+ static const char* Name(int reg);
+
+ // Lookup the register number for the name provided.
+ static int Number(const char* name);
+
+ struct RegisterAlias {
+ int reg;
+ const char *name;
+ };
+
+ private:
+ static const char* names_[kNumRegisters];
+ static const RegisterAlias aliases_[];
+};
+
+
+
} } // namespace assembler::arm
#endif // V8_ARM_CONSTANTS_ARM_H_
#include "v8.h"
+#include "constants-arm.h"
#include "disasm.h"
#include "macro-assembler.h"
#include "platform.h"
namespace v8i = v8::internal;
-static const int kMaxRegisters = 16;
-
-// These register names are defined in a way to match the native disassembler
-// formatting. See for example the command "objdump -d <binary file>".
-static const char* reg_names[kMaxRegisters] = {
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc",
-};
-
-
const char* NameConverter::NameOfAddress(byte* addr) const {
static v8::internal::EmbeddedVector<char, 32> tmp_buffer;
v8::internal::OS::SNPrintF(tmp_buffer, "%p", addr);
const char* NameConverter::NameOfCPURegister(int reg) const {
- const char* result;
- if ((0 <= reg) && (reg < kMaxRegisters)) {
- result = reg_names[reg];
- } else {
- result = "noreg";
- }
- return result;
+ return assembler::arm::Registers::Name(reg);
}
Simulator* sim_;
+ int32_t GetRegisterValue(int regnum);
bool GetValue(const char* desc, int32_t* value);
// Set or delete a breakpoint. Returns true if successful.
#endif
-// The order of these are important, see the handling of the 'print all'
-// debugger command.
-static const char* reg_names[] = { "r0", "r1", "r2", "r3",
- "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11",
- "r12", "r13", "r14", "r15",
- "pc", "lr", "sp", "ip",
- "fp", "sl", ""};
-
-static int reg_nums[] = { 0, 1, 2, 3,
- 4, 5, 6, 7,
- 8, 9, 10, 11,
- 12, 13, 14, 15,
- 15, 14, 13, 12,
- 11, 10};
-
-
-static int RegNameToRegNum(const char* name) {
- int reg = 0;
- while (*reg_names[reg] != 0) {
- if (strcmp(reg_names[reg], name) == 0) {
- return reg_nums[reg];
- }
- reg++;
+int32_t Debugger::GetRegisterValue(int regnum) {
+ if (regnum == kPCRegister) {
+ return sim_->get_pc();
+ } else {
+ return sim_->get_register(regnum);
}
- return -1;
}
bool Debugger::GetValue(const char* desc, int32_t* value) {
- int regnum = RegNameToRegNum(desc);
- if (regnum >= 0) {
- if (regnum == 15) {
- *value = sim_->get_pc();
- } else {
- *value = sim_->get_register(regnum);
- }
+ int regnum = Registers::Number(desc);
+ if (regnum != kNoRegister) {
+ *value = GetRegisterValue(regnum);
return true;
} else {
return SScanF(desc, "%i", value) == 1;
if (args == 2) {
int32_t value;
if (strcmp(arg1, "all") == 0) {
- for (int i = 0; i <= 15; i++) {
- if (GetValue(reg_names[i], &value)) {
- if (i <= 10) {
- PrintF("%3s: 0x%08x %d\n", reg_names[i], value, value);
- } else {
- PrintF("%3s: 0x%08x %d\n",
- reg_names[15 + 16 - i],
- value,
- value);
- }
- }
+ for (int i = 0; i < kNumRegisters; i++) {
+ value = GetRegisterValue(i);
+ PrintF("%3s: 0x%08x %10d\n", Registers::Name(i), value, value);
}
} else {
if (GetValue(arg1, &value)) {
int32_t value;
if (GetValue(arg1, &value)) {
Object* obj = reinterpret_cast<Object*>(value);
- USE(obj);
PrintF("%s: \n", arg1);
#ifdef DEBUG
obj->PrintLn();
RelativePath="..\..\src\compiler.h"
>
</File>
+ <File
+ RelativePath="..\..\src\arm\constants-arm.cc"
+ >
+ </File>
<File
RelativePath="..\..\src\arm\constants-arm.h"
>
projects / platform / upstream / v8.git / commitdiff