[llvm-exegesis] Fix 44b9942898c7.
authorClement Courbet <courbet@google.com>
Mon, 2 Dec 2019 13:58:41 +0000 (14:58 +0100)
committerClement Courbet <courbet@google.com>
Mon, 2 Dec 2019 15:13:27 +0000 (16:13 +0100)
Summary:
Add missing stack release instructions in
loadImplicitRegAndFinalize.

Reviewers: pengfei, gchatelet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70903

llvm/test/tools/llvm-exegesis/X86/latency-SQRTSSr.s [new file with mode: 0644]
llvm/tools/llvm-exegesis/lib/X86/Target.cpp

diff --git a/llvm/test/tools/llvm-exegesis/X86/latency-SQRTSSr.s b/llvm/test/tools/llvm-exegesis/X86/latency-SQRTSSr.s
new file mode 100644 (file)
index 0000000..1908b9a
--- /dev/null
@@ -0,0 +1,13 @@
+# RUN: llvm-exegesis -mode=latency -opcode-name=SQRTSSr -repetition-mode=loop | FileCheck %s
+
+# Check that the setup code for MXCSR does not crash the snippet.
+
+CHECK:      ---
+CHECK-NEXT: mode: latency
+CHECK-NEXT: key:
+CHECK-NEXT:   instructions:
+CHECK-NEXT:     SQRTSSr
+CHECK-NEXT: config: ''
+CHECK-NEXT: register_initial_values:
+CHECK-NOT: crashed
+CHECK-LAST: ...
index 08724dd..61da38e 100644 (file)
@@ -513,6 +513,7 @@ ConstantInliner::loadImplicitRegAndFinalize(unsigned Opcode, unsigned Value) {
           .addReg(0)        // IndexReg
           .addImm(0)        // Disp
           .addReg(0));      // Segment
+  add(releaseStackSpace(4));
   return std::move(Instructions);
 }