parse_em28xx_drxk.pl: Sort register definitions for DRX-K

Sort all register definitions. This makes easier to identify
the gaps at the registers.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

diff --git a/contrib/em28xx/parse_em28xx_drxk.pl b/contrib/em28xx/parse_em28xx_drxk.pl
index 6f26a94..597491c 100755 (executable)
--- a/contrib/em28xx/parse_em28xx_drxk.pl
+++ b/contrib/em28xx/parse_em28xx_drxk.pl
@@ -160,139 +160,50 @@ sub output_ac97()
 #   cat drivers/media/dvb/frontends/drxk_map.h |perl -ne 'if (/define\s+([^\s]+__A)\s+(.*)/) { printf "\t0x%08x => \"%s\",\n",hex($2), $1; }'
 #
 my %drxk_map = (
-       0x01000000 => "AUD_COMM_EXEC__A",
-       0x01c00000 => "FEC_COMM_EXEC__A",
-       0x01c20000 => "FEC_DI_COMM_EXEC__A",
-       0x01c20016 => "FEC_DI_INPUT_CTL__A",
-       0x01c30000 => "FEC_RS_COMM_EXEC__A",
-       0x01c30012 => "FEC_RS_MEASUREMENT_PERIOD__A",
-       0x01c30013 => "FEC_RS_MEASUREMENT_PRESCALE__A",
-       0x01c40011 => "FEC_OC_MODE__A",
-       0x01c40014 => "FEC_OC_DTO_MODE__A",
-       0x01c40015 => "FEC_OC_DTO_PERIOD__A",
-       0x01c40018 => "FEC_OC_DTO_BURST_LEN__A",
-       0x01c4001a => "FEC_OC_FCT_MODE__A",
-       0x01c4001e => "FEC_OC_TMD_MODE__A",
-       0x01c4001f => "FEC_OC_TMD_COUNT__A",
-       0x01c40020 => "FEC_OC_TMD_HI_MARGIN__A",
-       0x01c40021 => "FEC_OC_TMD_LO_MARGIN__A",
-       0x01c40023 => "FEC_OC_TMD_INT_UPD_RATE__A",
-       0x01c40026 => "FEC_OC_AVR_PARM_A__A",
-       0x01c40027 => "FEC_OC_AVR_PARM_B__A",
-       0x01c4002e => "FEC_OC_RCN_GAIN__A",
-       0x01c40030 => "FEC_OC_RCN_CTL_RATE_LO__A",
-       0x01c40032 => "FEC_OC_RCN_CTL_STEP_LO__A",
-       0x01c40033 => "FEC_OC_RCN_CTL_STEP_HI__A",
-       0x01c40040 => "FEC_OC_SNC_MODE__A",
-       0x01c40041 => "FEC_OC_SNC_LWM__A",
-       0x01c40042 => "FEC_OC_SNC_HWM__A",
-       0x01c40043 => "FEC_OC_SNC_UNLOCK__A",
-       0x01c40046 => "FEC_OC_SNC_FAIL_PERIOD__A",
-       0x01c40048 => "FEC_OC_IPR_MODE__A",
-       0x01c40049 => "FEC_OC_IPR_INVERT__A",
-       0x01c40052 => "FEC_OC_OCR_INVERT__A",
-       0x01800000 => "IQM_COMM_EXEC__A",
-       0x01820010 => "IQM_FS_RATE_OFS_LO__A",
-       0x01820014 => "IQM_FS_ADJ_SEL__A",
-       0x01830010 => "IQM_FD_RATESEL__A",
-       0x01840010 => "IQM_RC_RATE_OFS_LO__A",
-       0x01840014 => "IQM_RC_ADJ_SEL__A",
-       0x01840016 => "IQM_RC_STRETCH__A",
-       0x01860006 => "IQM_CF_COMM_INT_MSK__A",
-       0x01860010 => "IQM_CF_SYMMETRIC__A",
-       0x01860011 => "IQM_CF_MIDTAP__A",
-       0x01860012 => "IQM_CF_OUT_ENA__A",
-       0x01860013 => "IQM_CF_ADJ_SEL__A",
-       0x01860014 => "IQM_CF_SCALE__A",
-       0x01860015 => "IQM_CF_SCALE_SH__A",
-       0x01860017 => "IQM_CF_POW_MEAS_LEN__A",
-       0x01860019 => "IQM_CF_DS_ENA__A",
-       0x01860020 => "IQM_CF_TAP_RE0__A",
-       0x01860040 => "IQM_CF_TAP_IM0__A",
-       0x01860060 => "IQM_CF_CLP_VAL__A",
-       0x01860061 => "IQM_CF_DATATH__A",
-       0x01860062 => "IQM_CF_PKDTH__A",
-       0x01860063 => "IQM_CF_WND_LEN__A",
-       0x01860064 => "IQM_CF_DET_LCT__A",
-       0x01860067 => "IQM_CF_BYPASSDET__A",
-       0x01870000 => "IQM_AF_COMM_EXEC__A",
-       0x01870012 => "IQM_AF_CLKNEG__A",
-       0x0187001b => "IQM_AF_START_LOCK__A",
-       0x0187001c => "IQM_AF_PHASE0__A",
-       0x0187001d => "IQM_AF_PHASE1__A",
-       0x0187001e => "IQM_AF_PHASE2__A",
-       0x01870023 => "IQM_AF_CLP_LEN__A",
-       0x01870024 => "IQM_AF_CLP_TH__A",
-       0x01870026 => "IQM_AF_SNS_LEN__A",
-       0x01870028 => "IQM_AF_AGC_IF__A",
-       0x01870029 => "IQM_AF_AGC_RF__A",
-       0x0187002b => "IQM_AF_PDREF__A",
-       0x0187002c => "IQM_AF_STDBY__A",
-       0x0187002d => "IQM_AF_AMUX__A",
-       0x0187002f => "IQM_AF_UPD_SEL__A",
-       0x01870034 => "IQM_AF_INC_LCT__A",
-       0x01870036 => "IQM_AF_INC_BYPASS__A",
-       0x02800000 => "OFDM_CP_COMM_EXEC__A",
-       0x03410013 => "OFDM_EC_SB_PRIOR__A",
-       0x03010054 => "OFDM_EQ_TOP_TD_TPS_CONST__A",
-       0x03010056 => "OFDM_EQ_TOP_TD_TPS_CODE_HP__A",
-       0x0301005e => "OFDM_EQ_TOP_TD_SQR_ERR_I__A",
-       0x0301005f => "OFDM_EQ_TOP_TD_SQR_ERR_Q__A",
-       0x03010060 => "OFDM_EQ_TOP_TD_SQR_ERR_EXP__A",
-       0x03010061 => "OFDM_EQ_TOP_TD_REQ_SMB_CNT__A",
-       0x03010062 => "OFDM_EQ_TOP_TD_TPS_PWR_OFS__A",
-       0x03800000 => "OFDM_LC_COMM_EXEC__A",
-       0x03c00000 => "OFDM_SC_COMM_EXEC__A",
-       0x03c00001 => "OFDM_SC_COMM_STATE__A",
-       0x03c20040 => "OFDM_SC_RA_RAM_PARAM0__A",
-       0x03c20041 => "OFDM_SC_RA_RAM_PARAM1__A",
-       0x03c20042 => "OFDM_SC_RA_RAM_CMD_ADDR__A",
-       0x03c20043 => "OFDM_SC_RA_RAM_CMD__A",
-       0x03c20048 => "OFDM_SC_RA_RAM_OP_PARAM__A",
-       0x03c2004b => "OFDM_SC_RA_RAM_LOCK__A",
-       0x03c2004d => "OFDM_SC_RA_RAM_BE_OPT_DELAY__A",
-       0x03c2004e => "OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A",
-       0x03c2004f => "OFDM_SC_RA_RAM_ECHO_THRES__A",
-       0x03c20050 => "OFDM_SC_RA_RAM_CONFIG__A",
-       0x03c2007d => "OFDM_SC_RA_RAM_FR_THRES_8K__A",
-       0x03c200e0 => "OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A",
-       0x03c200e1 => "OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A",
-       0x03c200e3 => "OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A",
-       0x03c200e4 => "OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A",
-       0x03c200f8 => "OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A",
-       0x01400000 => "QAM_COMM_EXEC__A",
-       0x01430017 => "QAM_SL_ERR_POWER__A",
-       0x01440018 => "QAM_DQ_QUAL_FUN0__A",
-       0x01440019 => "QAM_DQ_QUAL_FUN1__A",
-       0x0144001a => "QAM_DQ_QUAL_FUN2__A",
-       0x0144001b => "QAM_DQ_QUAL_FUN3__A",
-       0x0144001c => "QAM_DQ_QUAL_FUN4__A",
-       0x0144001d => "QAM_DQ_QUAL_FUN5__A",
-       0x01450010 => "QAM_LC_MODE__A",
-       0x01450018 => "QAM_LC_QUAL_TAB0__A",
-       0x01450019 => "QAM_LC_QUAL_TAB1__A",
-       0x0145001a => "QAM_LC_QUAL_TAB2__A",
-       0x0145001b => "QAM_LC_QUAL_TAB3__A",
-       0x0145001c => "QAM_LC_QUAL_TAB4__A",
-       0x0145001d => "QAM_LC_QUAL_TAB5__A",
-       0x0145001e => "QAM_LC_QUAL_TAB6__A",
-       0x0145001f => "QAM_LC_QUAL_TAB8__A",
-       0x01450020 => "QAM_LC_QUAL_TAB9__A",
-       0x01450021 => "QAM_LC_QUAL_TAB10__A",
-       0x01450022 => "QAM_LC_QUAL_TAB12__A",
-       0x01450023 => "QAM_LC_QUAL_TAB15__A",
-       0x01450024 => "QAM_LC_QUAL_TAB16__A",
-       0x01450025 => "QAM_LC_QUAL_TAB20__A",
-       0x01450026 => "QAM_LC_QUAL_TAB25__A",
-       0x01450028 => "QAM_LC_LPF_FACTORP__A",
-       0x01450029 => "QAM_LC_LPF_FACTORI__A",
-       0x0145002a => "QAM_LC_RATE_LIMIT__A",
-       0x0145002b => "QAM_LC_SYMBOL_FREQ__A",
-       0x01470011 => "QAM_SY_TIMEOUT__A",
-       0x01470012 => "QAM_SY_SYNC_LWM__A",
-       0x01470013 => "QAM_SY_SYNC_AWM__A",
-       0x01470014 => "QAM_SY_SYNC_HWM__A",
-       0x01470017 => "QAM_SY_SP_INV__A",
+
+       0x0041000f => "SIO_TOP_COMM_KEY__A",
+       0x00410012 => "SIO_TOP_JTAGID_LO__A",
+       0x00420031 => "SIO_HI_RA_RAM_RES__A",
+       0x00420032 => "SIO_HI_RA_RAM_CMD__A",
+       0x00420033 => "SIO_HI_RA_RAM_PAR_1__A",
+       0x00420034 => "SIO_HI_RA_RAM_PAR_2__A",
+       0x00420035 => "SIO_HI_RA_RAM_PAR_3__A",
+       0x00420036 => "SIO_HI_RA_RAM_PAR_4__A",
+       0x00420037 => "SIO_HI_RA_RAM_PAR_5__A",
+       0x00420038 => "SIO_HI_RA_RAM_PAR_6__A",
+       0x00450012 => "SIO_CC_PLL_LOCK__A",
+       0x00450015 => "SIO_CC_PWD_MODE__A",
+       0x00450016 => "SIO_CC_SOFT_RST__A",
+       0x00450017 => "SIO_CC_UPDATE__A",
+       0x00470010 => "SIO_OFDM_SH_OFDM_RING_ENABLE__A",
+       0x00470012 => "SIO_OFDM_SH_OFDM_RING_STATUS__A",
+       0x00480000 => "SIO_BL_COMM_EXEC__A",
+       0x00480010 => "SIO_BL_STATUS__A",
+       0x00480011 => "SIO_BL_MODE__A",
+       0x00480012 => "SIO_BL_ENABLE__A",
+       0x00480014 => "SIO_BL_TGT_HDR__A",
+       0x00480015 => "SIO_BL_TGT_ADDR__A",
+       0x00480016 => "SIO_BL_SRC_ADDR__A",
+       0x00480017 => "SIO_BL_SRC_LEN__A",
+       0x00480018 => "SIO_BL_CHAIN_ADDR__A",
+       0x00480019 => "SIO_BL_CHAIN_LEN__A",
+       0x007f0010 => "SIO_PDR_MON_CFG__A",
+       0x007f0015 => "SIO_PDR_UIO_IN_HI__A",
+       0x007f0016 => "SIO_PDR_UIO_OUT_LO__A",
+       0x007f001f => "SIO_PDR_OHW_CFG__A",
+       0x007f0025 => "SIO_PDR_MSTRT_CFG__A",
+       0x007f0026 => "SIO_PDR_MERR_CFG__A",
+       0x007f0028 => "SIO_PDR_MCLK_CFG__A",
+       0x007f0029 => "SIO_PDR_MVAL_CFG__A",
+       0x007f002a => "SIO_PDR_MD0_CFG__A",
+       0x007f002b => "SIO_PDR_MD1_CFG__A",
+       0x007f002c => "SIO_PDR_MD2_CFG__A",
+       0x007f002d => "SIO_PDR_MD3_CFG__A",
+       0x007f002f => "SIO_PDR_MD4_CFG__A",
+       0x007f0030 => "SIO_PDR_MD5_CFG__A",
+       0x007f0031 => "SIO_PDR_MD6_CFG__A",
+       0x007f0032 => "SIO_PDR_MD7_CFG__A",
+       0x007f0038 => "SIO_PDR_SMA_TX_CFG__A",
        0x00800000 => "SCU_COMM_EXEC__A",
        0x00831ebf => "SCU_RAM_DRIVER_DEBUG__A",
        0x00831ec4 => "SCU_RAM_QAM_FSM_STEP_PERIOD__A",
@@ -390,49 +301,139 @@ my %drxk_map = (
        0x00831fed => "SCU_RAM_PARAM_15__A",
        0x00831ffc => "SCU_RAM_PARAM_0__A",
        0x00831ffd => "SCU_RAM_COMMAND__A",
-       0x0041000f => "SIO_TOP_COMM_KEY__A",
-       0x00410012 => "SIO_TOP_JTAGID_LO__A",
-       0x00420031 => "SIO_HI_RA_RAM_RES__A",
-       0x00420032 => "SIO_HI_RA_RAM_CMD__A",
-       0x00420033 => "SIO_HI_RA_RAM_PAR_1__A",
-       0x00420034 => "SIO_HI_RA_RAM_PAR_2__A",
-       0x00420035 => "SIO_HI_RA_RAM_PAR_3__A",
-       0x00420036 => "SIO_HI_RA_RAM_PAR_4__A",
-       0x00420037 => "SIO_HI_RA_RAM_PAR_5__A",
-       0x00420038 => "SIO_HI_RA_RAM_PAR_6__A",
-       0x00450012 => "SIO_CC_PLL_LOCK__A",
-       0x00450015 => "SIO_CC_PWD_MODE__A",
-       0x00450016 => "SIO_CC_SOFT_RST__A",
-       0x00450017 => "SIO_CC_UPDATE__A",
-       0x00470010 => "SIO_OFDM_SH_OFDM_RING_ENABLE__A",
-       0x00470012 => "SIO_OFDM_SH_OFDM_RING_STATUS__A",
-       0x00480000 => "SIO_BL_COMM_EXEC__A",
-       0x00480010 => "SIO_BL_STATUS__A",
-       0x00480011 => "SIO_BL_MODE__A",
-       0x00480012 => "SIO_BL_ENABLE__A",
-       0x00480014 => "SIO_BL_TGT_HDR__A",
-       0x00480015 => "SIO_BL_TGT_ADDR__A",
-       0x00480016 => "SIO_BL_SRC_ADDR__A",
-       0x00480017 => "SIO_BL_SRC_LEN__A",
-       0x00480018 => "SIO_BL_CHAIN_ADDR__A",
-       0x00480019 => "SIO_BL_CHAIN_LEN__A",
-       0x007f0010 => "SIO_PDR_MON_CFG__A",
-       0x007f0015 => "SIO_PDR_UIO_IN_HI__A",
-       0x007f0016 => "SIO_PDR_UIO_OUT_LO__A",
-       0x007f001f => "SIO_PDR_OHW_CFG__A",
-       0x007f0025 => "SIO_PDR_MSTRT_CFG__A",
-       0x007f0026 => "SIO_PDR_MERR_CFG__A",
-       0x007f0028 => "SIO_PDR_MCLK_CFG__A",
-       0x007f0029 => "SIO_PDR_MVAL_CFG__A",
-       0x007f002a => "SIO_PDR_MD0_CFG__A",
-       0x007f002b => "SIO_PDR_MD1_CFG__A",
-       0x007f002c => "SIO_PDR_MD2_CFG__A",
-       0x007f002d => "SIO_PDR_MD3_CFG__A",
-       0x007f002f => "SIO_PDR_MD4_CFG__A",
-       0x007f0030 => "SIO_PDR_MD5_CFG__A",
-       0x007f0031 => "SIO_PDR_MD6_CFG__A",
-       0x007f0032 => "SIO_PDR_MD7_CFG__A",
-       0x007f0038 => "SIO_PDR_SMA_TX_CFG__A",
+       0x01000000 => "AUD_COMM_EXEC__A",
+       0x01400000 => "QAM_COMM_EXEC__A",
+       0x01430017 => "QAM_SL_ERR_POWER__A",
+       0x01440018 => "QAM_DQ_QUAL_FUN0__A",
+       0x01440019 => "QAM_DQ_QUAL_FUN1__A",
+       0x0144001a => "QAM_DQ_QUAL_FUN2__A",
+       0x0144001b => "QAM_DQ_QUAL_FUN3__A",
+       0x0144001c => "QAM_DQ_QUAL_FUN4__A",
+       0x0144001d => "QAM_DQ_QUAL_FUN5__A",
+       0x01450010 => "QAM_LC_MODE__A",
+       0x01450018 => "QAM_LC_QUAL_TAB0__A",
+       0x01450019 => "QAM_LC_QUAL_TAB1__A",
+       0x0145001a => "QAM_LC_QUAL_TAB2__A",
+       0x0145001b => "QAM_LC_QUAL_TAB3__A",
+       0x0145001c => "QAM_LC_QUAL_TAB4__A",
+       0x0145001d => "QAM_LC_QUAL_TAB5__A",
+       0x0145001e => "QAM_LC_QUAL_TAB6__A",
+       0x0145001f => "QAM_LC_QUAL_TAB8__A",
+       0x01450020 => "QAM_LC_QUAL_TAB9__A",
+       0x01450021 => "QAM_LC_QUAL_TAB10__A",
+       0x01450022 => "QAM_LC_QUAL_TAB12__A",
+       0x01450023 => "QAM_LC_QUAL_TAB15__A",
+       0x01450024 => "QAM_LC_QUAL_TAB16__A",
+       0x01450025 => "QAM_LC_QUAL_TAB20__A",
+       0x01450026 => "QAM_LC_QUAL_TAB25__A",
+       0x01450028 => "QAM_LC_LPF_FACTORP__A",
+       0x01450029 => "QAM_LC_LPF_FACTORI__A",
+       0x0145002a => "QAM_LC_RATE_LIMIT__A",
+       0x0145002b => "QAM_LC_SYMBOL_FREQ__A",
+       0x01470011 => "QAM_SY_TIMEOUT__A",
+       0x01470012 => "QAM_SY_SYNC_LWM__A",
+       0x01470013 => "QAM_SY_SYNC_AWM__A",
+       0x01470014 => "QAM_SY_SYNC_HWM__A",
+       0x01470017 => "QAM_SY_SP_INV__A",
+       0x01800000 => "IQM_COMM_EXEC__A",
+       0x01820010 => "IQM_FS_RATE_OFS_LO__A",
+       0x01820014 => "IQM_FS_ADJ_SEL__A",
+       0x01830010 => "IQM_FD_RATESEL__A",
+       0x01840010 => "IQM_RC_RATE_OFS_LO__A",
+       0x01840014 => "IQM_RC_ADJ_SEL__A",
+       0x01840016 => "IQM_RC_STRETCH__A",
+       0x01860006 => "IQM_CF_COMM_INT_MSK__A",
+       0x01860010 => "IQM_CF_SYMMETRIC__A",
+       0x01860011 => "IQM_CF_MIDTAP__A",
+       0x01860012 => "IQM_CF_OUT_ENA__A",
+       0x01860013 => "IQM_CF_ADJ_SEL__A",
+       0x01860014 => "IQM_CF_SCALE__A",
+       0x01860015 => "IQM_CF_SCALE_SH__A",
+       0x01860017 => "IQM_CF_POW_MEAS_LEN__A",
+       0x01860019 => "IQM_CF_DS_ENA__A",
+       0x01860020 => "IQM_CF_TAP_RE0__A",
+       0x01860040 => "IQM_CF_TAP_IM0__A",
+       0x01860060 => "IQM_CF_CLP_VAL__A",
+       0x01860061 => "IQM_CF_DATATH__A",
+       0x01860062 => "IQM_CF_PKDTH__A",
+       0x01860063 => "IQM_CF_WND_LEN__A",
+       0x01860064 => "IQM_CF_DET_LCT__A",
+       0x01860067 => "IQM_CF_BYPASSDET__A",
+       0x01870000 => "IQM_AF_COMM_EXEC__A",
+       0x01870012 => "IQM_AF_CLKNEG__A",
+       0x0187001b => "IQM_AF_START_LOCK__A",
+       0x0187001c => "IQM_AF_PHASE0__A",
+       0x0187001d => "IQM_AF_PHASE1__A",
+       0x0187001e => "IQM_AF_PHASE2__A",
+       0x01870023 => "IQM_AF_CLP_LEN__A",
+       0x01870024 => "IQM_AF_CLP_TH__A",
+       0x01870026 => "IQM_AF_SNS_LEN__A",
+       0x01870028 => "IQM_AF_AGC_IF__A",
+       0x01870029 => "IQM_AF_AGC_RF__A",
+       0x0187002b => "IQM_AF_PDREF__A",
+       0x0187002c => "IQM_AF_STDBY__A",
+       0x0187002d => "IQM_AF_AMUX__A",
+       0x0187002f => "IQM_AF_UPD_SEL__A",
+       0x01870034 => "IQM_AF_INC_LCT__A",
+       0x01870036 => "IQM_AF_INC_BYPASS__A",
+       0x01c00000 => "FEC_COMM_EXEC__A",
+       0x01c20000 => "FEC_DI_COMM_EXEC__A",
+       0x01c20016 => "FEC_DI_INPUT_CTL__A",
+       0x01c30000 => "FEC_RS_COMM_EXEC__A",
+       0x01c30012 => "FEC_RS_MEASUREMENT_PERIOD__A",
+       0x01c30013 => "FEC_RS_MEASUREMENT_PRESCALE__A",
+       0x01c40011 => "FEC_OC_MODE__A",
+       0x01c40014 => "FEC_OC_DTO_MODE__A",
+       0x01c40015 => "FEC_OC_DTO_PERIOD__A",
+       0x01c40018 => "FEC_OC_DTO_BURST_LEN__A",
+       0x01c4001a => "FEC_OC_FCT_MODE__A",
+       0x01c4001e => "FEC_OC_TMD_MODE__A",
+       0x01c4001f => "FEC_OC_TMD_COUNT__A",
+       0x01c40020 => "FEC_OC_TMD_HI_MARGIN__A",
+       0x01c40021 => "FEC_OC_TMD_LO_MARGIN__A",
+       0x01c40023 => "FEC_OC_TMD_INT_UPD_RATE__A",
+       0x01c40026 => "FEC_OC_AVR_PARM_A__A",
+       0x01c40027 => "FEC_OC_AVR_PARM_B__A",
+       0x01c4002e => "FEC_OC_RCN_GAIN__A",
+       0x01c40030 => "FEC_OC_RCN_CTL_RATE_LO__A",
+       0x01c40032 => "FEC_OC_RCN_CTL_STEP_LO__A",
+       0x01c40033 => "FEC_OC_RCN_CTL_STEP_HI__A",
+       0x01c40040 => "FEC_OC_SNC_MODE__A",
+       0x01c40041 => "FEC_OC_SNC_LWM__A",
+       0x01c40042 => "FEC_OC_SNC_HWM__A",
+       0x01c40043 => "FEC_OC_SNC_UNLOCK__A",
+       0x01c40046 => "FEC_OC_SNC_FAIL_PERIOD__A",
+       0x01c40048 => "FEC_OC_IPR_MODE__A",
+       0x01c40049 => "FEC_OC_IPR_INVERT__A",
+       0x01c40052 => "FEC_OC_OCR_INVERT__A",
+       0x02800000 => "OFDM_CP_COMM_EXEC__A",
+       0x03010054 => "OFDM_EQ_TOP_TD_TPS_CONST__A",
+       0x03010056 => "OFDM_EQ_TOP_TD_TPS_CODE_HP__A",
+       0x0301005e => "OFDM_EQ_TOP_TD_SQR_ERR_I__A",
+       0x0301005f => "OFDM_EQ_TOP_TD_SQR_ERR_Q__A",
+       0x03010060 => "OFDM_EQ_TOP_TD_SQR_ERR_EXP__A",
+       0x03010061 => "OFDM_EQ_TOP_TD_REQ_SMB_CNT__A",
+       0x03010062 => "OFDM_EQ_TOP_TD_TPS_PWR_OFS__A",
+       0x03410013 => "OFDM_EC_SB_PRIOR__A",
+       0x03800000 => "OFDM_LC_COMM_EXEC__A",
+       0x03c00000 => "OFDM_SC_COMM_EXEC__A",
+       0x03c00001 => "OFDM_SC_COMM_STATE__A",
+       0x03c20040 => "OFDM_SC_RA_RAM_PARAM0__A",
+       0x03c20041 => "OFDM_SC_RA_RAM_PARAM1__A",
+       0x03c20042 => "OFDM_SC_RA_RAM_CMD_ADDR__A",
+       0x03c20043 => "OFDM_SC_RA_RAM_CMD__A",
+       0x03c20048 => "OFDM_SC_RA_RAM_OP_PARAM__A",
+       0x03c2004b => "OFDM_SC_RA_RAM_LOCK__A",
+       0x03c2004d => "OFDM_SC_RA_RAM_BE_OPT_DELAY__A",
+       0x03c2004e => "OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A",
+       0x03c2004f => "OFDM_SC_RA_RAM_ECHO_THRES__A",
+       0x03c20050 => "OFDM_SC_RA_RAM_CONFIG__A",
+       0x03c2007d => "OFDM_SC_RA_RAM_FR_THRES_8K__A",
+       0x03c200e0 => "OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A",
+       0x03c200e1 => "OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A",
+       0x03c200e3 => "OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A",
+       0x03c200e4 => "OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A",
+       0x03c200f8 => "OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A",
 );
 
 sub parse_drxk_addr($$$$)