arm64: tegra: Remove parent clock from display controllers
authorThierry Reding <treding@nvidia.com>
Fri, 7 Feb 2020 17:17:58 +0000 (18:17 +0100)
committerThierry Reding <treding@nvidia.com>
Tue, 23 Jun 2020 16:27:03 +0000 (18:27 +0200)
The display controller's parent clock depends on the output that's
consuming data from the display controller, so it needs to be specified
as the parent of the corresponding output. The device tree bindings do
specify this, so just correct the existing device trees that get this
wrong.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra132.dtsi
arch/arm64/boot/dts/nvidia/tegra210.dtsi

index 76e1a64..4fc34c5 100644 (file)
                        compatible = "nvidia,tegra124-dc";
                        reg = <0x0 0x54200000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&tegra_car TEGRA124_CLK_DISP1>,
-                                <&tegra_car TEGRA124_CLK_PLL_P>;
-                       clock-names = "dc", "parent";
+                       clocks = <&tegra_car TEGRA124_CLK_DISP1>;
+                       clock-names = "dc";
                        resets = <&tegra_car 27>;
                        reset-names = "dc";
 
                        compatible = "nvidia,tegra124-dc";
                        reg = <0x0 0x54240000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&tegra_car TEGRA124_CLK_DISP2>,
-                                <&tegra_car TEGRA124_CLK_PLL_P>;
-                       clock-names = "dc", "parent";
+                       clocks = <&tegra_car TEGRA124_CLK_DISP2>;
+                       clock-names = "dc";
                        resets = <&tegra_car 26>;
                        reset-names = "dc";
 
index 0586722..41ffa05 100644 (file)
                        compatible = "nvidia,tegra210-dc";
                        reg = <0x0 0x54200000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&tegra_car TEGRA210_CLK_DISP1>,
-                                <&tegra_car TEGRA210_CLK_PLL_P>;
-                       clock-names = "dc", "parent";
+                       clocks = <&tegra_car TEGRA210_CLK_DISP1>;
+                       clock-names = "dc";
                        resets = <&tegra_car 27>;
                        reset-names = "dc";
 
                        compatible = "nvidia,tegra210-dc";
                        reg = <0x0 0x54240000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&tegra_car TEGRA210_CLK_DISP2>,
-                                <&tegra_car TEGRA210_CLK_PLL_P>;
-                       clock-names = "dc", "parent";
+                       clocks = <&tegra_car TEGRA210_CLK_DISP2>;
+                       clock-names = "dc";
                        resets = <&tegra_car 26>;
                        reset-names = "dc";