serial: mvebu-uart: uart2 error bits clearing
authorNarendra Hadke <nhadke@marvell.com>
Tue, 26 Jul 2022 09:12:21 +0000 (11:12 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Aug 2022 12:22:56 +0000 (14:22 +0200)
commit a7209541239e5dd44d981289e5f9059222d40fd1 upstream.

For mvebu uart2, error bits are not cleared on buffer read.
This causes interrupt loop and system hang.

Cc: stable@vger.kernel.org
Reviewed-by: Yi Guo <yi.guo@cavium.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Narendra Hadke <nhadke@marvell.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Link: https://lore.kernel.org/r/20220726091221.12358-1-pali@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/mvebu-uart.c

index 8eb6489..1074a0f 100644 (file)
@@ -237,6 +237,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
        struct tty_port *tport = &port->state->port;
        unsigned char ch = 0;
        char flag = 0;
+       int ret;
 
        do {
                if (status & STAT_RX_RDY(port)) {
@@ -249,6 +250,16 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
                                port->icount.parity++;
                }
 
+               /*
+                * For UART2, error bits are not cleared on buffer read.
+                * This causes interrupt loop and system hang.
+                */
+               if (IS_EXTENDED(port) && (status & STAT_BRK_ERR)) {
+                       ret = readl(port->membase + UART_STAT);
+                       ret |= STAT_BRK_ERR;
+                       writel(ret, port->membase + UART_STAT);
+               }
+
                if (status & STAT_BRK_DET) {
                        port->icount.brk++;
                        status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);