soc/tegra: pmc: Add Tegra234 support
authorThierry Reding <treding@nvidia.com>
Thu, 17 Sep 2020 10:07:50 +0000 (12:07 +0200)
committerThierry Reding <treding@nvidia.com>
Fri, 18 Sep 2020 13:55:37 +0000 (15:55 +0200)
The PMC block is largely similar to that found on earlier chips, but
not completely compatible. Allow binding to the instantiation found on
Tegra234.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/pmc.c

index 3255eaf..9ed0c3b 100644 (file)
@@ -3362,7 +3362,75 @@ static const struct tegra_pmc_soc tegra194_pmc_soc = {
        .has_blink_output = false,
 };
 
+static const struct tegra_pmc_regs tegra234_pmc_regs = {
+       .scratch0 = 0x2000,
+       .dpd_req = 0,
+       .dpd_status = 0,
+       .dpd2_req = 0,
+       .dpd2_status = 0,
+       .rst_status = 0x70,
+       .rst_source_shift = 0x2,
+       .rst_source_mask = 0xfc,
+       .rst_level_shift = 0x0,
+       .rst_level_mask = 0x3,
+};
+
+static const char * const tegra234_reset_sources[] = {
+       "SYS_RESET_N",
+       "AOWDT",
+       "BCCPLEXWDT",
+       "BPMPWDT",
+       "SCEWDT",
+       "SPEWDT",
+       "APEWDT",
+       "LCCPLEXWDT",
+       "SENSOR",
+       "AOTAG",
+       "VFSENSOR",
+       "MAINSWRST",
+       "SC7",
+       "HSM",
+       "CSITE",
+       "RCEWDT",
+       "PVA0WDT",
+       "PVA1WDT",
+       "L1A_ASYNC",
+       "BPMPBOOT",
+       "FUSECRC",
+};
+
+static const struct tegra_pmc_soc tegra234_pmc_soc = {
+       .num_powergates = 0,
+       .powergates = NULL,
+       .num_cpu_powergates = 0,
+       .cpu_powergates = NULL,
+       .has_tsense_reset = false,
+       .has_gpu_clamps = false,
+       .needs_mbist_war = false,
+       .has_impl_33v_pwr = true,
+       .maybe_tz_only = false,
+       .num_io_pads = 0,
+       .io_pads = NULL,
+       .num_pin_descs = 0,
+       .pin_descs = NULL,
+       .regs = &tegra234_pmc_regs,
+       .init = NULL,
+       .setup_irq_polarity = tegra186_pmc_setup_irq_polarity,
+       .irq_set_wake = tegra186_pmc_irq_set_wake,
+       .irq_set_type = tegra186_pmc_irq_set_type,
+       .reset_sources = tegra234_reset_sources,
+       .num_reset_sources = ARRAY_SIZE(tegra234_reset_sources),
+       .reset_levels = tegra186_reset_levels,
+       .num_reset_levels = ARRAY_SIZE(tegra186_reset_levels),
+       .num_wake_events = 0,
+       .wake_events = NULL,
+       .pmc_clks_data = NULL,
+       .num_pmc_clks = 0,
+       .has_blink_output = false,
+};
+
 static const struct of_device_id tegra_pmc_match[] = {
+       { .compatible = "nvidia,tegra234-pmc", .data = &tegra234_pmc_soc },
        { .compatible = "nvidia,tegra194-pmc", .data = &tegra194_pmc_soc },
        { .compatible = "nvidia,tegra186-pmc", .data = &tegra186_pmc_soc },
        { .compatible = "nvidia,tegra210-pmc", .data = &tegra210_pmc_soc },