nouveau: Put dynamic textures in GART for CPU access and don't swizzle.
authorYounes Manton <younes.m@gmail.com>
Fri, 5 Dec 2008 07:26:07 +0000 (02:26 -0500)
committerYounes Manton <younes.m@gmail.com>
Sat, 10 Jan 2009 18:52:05 +0000 (13:52 -0500)
Also flag shadows as dynamic since they're for CPU access as well.

src/gallium/drivers/nouveau/nouveau_winsys.h
src/gallium/drivers/nv40/nv40_miptree.c
src/gallium/drivers/nv40/nv40_screen.c
src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.c
src/gallium/winsys/g3dvl/nouveau/nouveau_winsys_pipe.c

index 5535ebb..09726fd 100644 (file)
@@ -20,7 +20,8 @@
 #define NOUVEAU_TEXTURE_USAGE_LINEAR (1 << 16)
 
 #define NOUVEAU_BUFFER_USAGE_TEXTURE (1 << 16)
-#define NOUVEAU_BUFFER_USAGE_ZETA    (1 << 17)
+#define NOUVEAU_BUFFER_USAGE_CPU     (1 << 17)
+#define NOUVEAU_BUFFER_USAGE_ZETA    (1 << 18)
 
 struct nouveau_winsys {
        struct nouveau_context *nv;
index 36e08e7..5121434 100644 (file)
@@ -57,6 +57,8 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt)
 {
        struct pipe_winsys *ws = pscreen->winsys;
        struct nv40_miptree *mt;
+       unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL |
+                            NOUVEAU_BUFFER_USAGE_TEXTURE;
 
        mt = MALLOC(sizeof(struct nv40_miptree));
        if (!mt)
@@ -75,6 +77,9 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt)
        if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY |
                             PIPE_TEXTURE_USAGE_DISPLAY_TARGET))
                mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
+       else
+       if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC)
+               mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
        else {
                switch (pt->format) {
                /* TODO: Figure out which formats can be swizzled */
@@ -87,12 +92,12 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt)
                }
        }
 
+       if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC)
+               buf_usage |= NOUVEAU_BUFFER_USAGE_CPU;
+
        nv40_miptree_layout(mt);
 
-       mt->buffer = ws->buffer_create(ws, 256,
-                                      PIPE_BUFFER_USAGE_PIXEL |
-                                      NOUVEAU_BUFFER_USAGE_TEXTURE,
-                                      mt->total_size);
+       mt->buffer = ws->buffer_create(ws, 256, buf_usage, mt->total_size);
        if (!mt->buffer) {
                FREE(mt);
                return NULL;
index 995148e..9657a19 100644 (file)
@@ -148,7 +148,8 @@ nv40_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
 
                if (!mt->shadow_tex) {
                        unsigned old_tex_usage = surface->texture->tex_usage;
-                       surface->texture->tex_usage = NOUVEAU_TEXTURE_USAGE_LINEAR;
+                       surface->texture->tex_usage = NOUVEAU_TEXTURE_USAGE_LINEAR |
+                                                     PIPE_TEXTURE_USAGE_DYNAMIC;
                        mt->shadow_tex = screen->texture_create(screen, surface->texture);
                        surface->texture->tex_usage = old_tex_usage;
 
index 5276806..086f368 100644 (file)
@@ -49,7 +49,8 @@ nouveau_pipe_bo_create(struct pipe_winsys *pws, unsigned alignment,
        if (usage & PIPE_BUFFER_USAGE_PIXEL) {
                if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE)
                        flags |= NOUVEAU_BO_GART;
-               flags |= NOUVEAU_BO_VRAM;
+               if (!(usage & NOUVEAU_BUFFER_USAGE_CPU))
+                       flags |= NOUVEAU_BO_VRAM;
 
                switch (dev->chipset & 0xf0) {
                case 0x50:
index 4f6ac9c..17c677d 100644 (file)
@@ -112,7 +112,8 @@ nouveau_pipe_bo_create(struct pipe_winsys *pws, unsigned alignment,
        if (usage & PIPE_BUFFER_USAGE_PIXEL) {
                if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE)
                        flags |= NOUVEAU_BO_GART;
-               flags |= NOUVEAU_BO_VRAM;
+               if (!(usage & NOUVEAU_BUFFER_USAGE_CPU))
+                       flags |= NOUVEAU_BO_VRAM;
        }
 
        if (usage & PIPE_BUFFER_USAGE_VERTEX) {