udiv"
(const_string "alu"))
-
-; The "type" attribute is used by the AArch32 backend. Below is a mapping
-; from "v8type" to "type".
-
-(define_attr "type"
- "alu,alu_shift,block,branch,call,f_2_r,f_cvt,f_flag,f_loads,
- f_loadd,f_stored,f_stores,faddd,fadds,fcmpd,fcmps,fconstd,fconsts,
- fcpys,fdivd,fdivs,ffarithd,ffariths,fmacd,fmacs,fmuld,fmuls,load_byte,
- load1,load2,mult,r_2_f,store1,store2"
- (cond [
- (eq_attr "v8type" "alu_shift,alus_shift,logic_shift,logics_shift") (const_string "alu_shift")
- (eq_attr "v8type" "branch") (const_string "branch")
- (eq_attr "v8type" "call") (const_string "call")
- (eq_attr "v8type" "fmovf2i") (const_string "f_2_r")
- (eq_attr "v8type" "fcvt,fcvtf2i,fcvti2f") (const_string "f_cvt")
- (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF")) (const_string "f_loads")
- (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF")) (const_string "f_loadd")
- (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF")) (const_string "f_stores")
- (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF")) (const_string "f_stored")
- (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "DF")) (const_string "faddd")
- (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "SF")) (const_string "fadds")
- (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "DF")) (const_string "fcmpd")
- (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "SF")) (const_string "fcmps")
- (and (eq_attr "v8type" "fconst") (eq_attr "mode" "DF")) (const_string "fconstd")
- (and (eq_attr "v8type" "fconst") (eq_attr "mode" "SF")) (const_string "fconsts")
- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF")) (const_string "fdivd")
- (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF")) (const_string "fdivs")
- (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "DF")) (const_string "ffarithd")
- (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "SF")) (const_string "ffariths")
- (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "DF")) (const_string "fmacd")
- (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "SF")) (const_string "fmacs")
- (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF")) (const_string "fmuld")
- (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF")) (const_string "fmuls")
- (and (eq_attr "v8type" "load1") (eq_attr "mode" "QI,HI")) (const_string "load_byte")
- (and (eq_attr "v8type" "load1") (eq_attr "mode" "SI,DI,TI")) (const_string "load1")
- (eq_attr "v8type" "load2") (const_string "load2")
- (and (eq_attr "v8type" "mulh,mult,mull,madd,sdiv,udiv") (eq_attr "mode" "SI")) (const_string "mult")
- (eq_attr "v8type" "fmovi2f") (const_string "r_2_f")
- (eq_attr "v8type" "store1") (const_string "store1")
- (eq_attr "v8type" "store2") (const_string "store2")
- ]
- (const_string "alu")))
+; The "type" attribute is is included here from AArch32 backend to be able
+; to share pipeline descriptions.
+(include "../arm/types.md")
;; Attribute that specifies whether or not the instruction touches fp
;; registers.
[(set (pc) (match_operand:DI 0 "register_operand" "r"))]
""
"br\\t%0"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
)
(define_insn "jump"
[(set (pc) (label_ref (match_operand 0 "" "")))]
""
"b\\t%l0"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
)
(define_expand "cbranch<mode>4"
(pc)))]
""
"b%m0\\t%l2"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
)
(define_expand "casesi"
return aarch64_output_casesi (operands);
"
[(set_attr "length" "16")
- (set_attr "v8type" "branch")]
+ (set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
)
(define_insn "nop"
[(return)]
""
"ret"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
)
(define_insn "eh_return"
UNSPECV_EH_RETURN)]
""
"#"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
+
)
(define_split
(pc)))]
""
"<cbz>\\t%<w>0, %l1"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
+
)
(define_insn "*tb<optab><mode>1"
return \"<tbz>\\t%<w>0, %1, %l2\";
"
[(set_attr "v8type" "branch")
+ (set_attr "type" "branch")
(set_attr "mode" "<MODE>")
(set (attr "length")
(if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -32768))
return \"<tbz>\\t%<w>0, <sizem1>, %l1\";
"
[(set_attr "v8type" "branch")
+ (set_attr "type" "branch")
(set_attr "mode" "<MODE>")
(set (attr "length")
(if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -32768))
(clobber (reg:DI LR_REGNUM))]
""
"blr\\t%0"
- [(set_attr "v8type" "call")]
+ [(set_attr "v8type" "call")
+ (set_attr "type" "call")]
)
(define_insn "*call_symbol"
"GET_CODE (operands[0]) == SYMBOL_REF
&& !aarch64_is_long_call_p (operands[0])"
"bl\\t%a0"
- [(set_attr "v8type" "call")]
+ [(set_attr "v8type" "call")
+ (set_attr "type" "call")]
)
(define_expand "call_value"
(clobber (reg:DI LR_REGNUM))]
""
"blr\\t%1"
- [(set_attr "v8type" "call")]
+ [(set_attr "v8type" "call")
+ (set_attr "type" "call")]
+
)
(define_insn "*call_value_symbol"
"GET_CODE (operands[1]) == SYMBOL_REF
&& !aarch64_is_long_call_p (operands[1])"
"bl\\t%a1"
- [(set_attr "v8type" "call")]
+ [(set_attr "v8type" "call")
+ (set_attr "type" "call")]
)
(define_expand "sibcall"
(use (match_operand 2 "" ""))]
"GET_CODE (operands[0]) == SYMBOL_REF"
"b\\t%a0"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
+
)
(define_insn "*sibcall_value_insn"
(use (match_operand 3 "" ""))]
"GET_CODE (operands[1]) == SYMBOL_REF"
"b\\t%a1"
- [(set_attr "v8type" "branch")]
+ [(set_attr "v8type" "branch")
+ (set_attr "type" "branch")]
)
;; Call subroutine returning any type.
}
}
[(set_attr "v8type" "move,alu,alu,load1,load1,store1,store1,*,*,*")
+ (set_attr "type" "mov_reg,mov_imm,mov_imm,load1,load1,store1,store1,*,*,*")
(set_attr "simd_type" "*,*,simd_move_imm,*,*,*,*,simd_movgp,simd_dupgp,simd_dup")
(set_attr "simd" "*,*,yes,*,*,*,*,yes,yes,yes")
(set_attr "mode" "<MODE>")
fmov\\t%w0, %s1
fmov\\t%s0, %s1"
[(set_attr "v8type" "move,move,move,alu,load1,load1,store1,store1,adr,adr,fmov,fmov,fmov")
+ (set_attr "type" "mov_reg,mov_reg,mov_reg,arlo_reg,load1,load1,store1,store1,\
+ mov_reg,mov_reg,mov_reg,mov_reg,mov_reg")
(set_attr "mode" "SI")
(set_attr "fp" "*,*,*,*,*,yes,*,yes,*,*,yes,yes,yes")]
)
fmov\\t%d0, %d1
movi\\t%d0, %1"
[(set_attr "v8type" "move,move,move,alu,load1,load1,store1,store1,adr,adr,fmov,fmov,fmov,fmov")
+ (set_attr "type" "mov_reg,mov_reg,mov_reg,mov_imm,load1,load1,store1,store1,\
+ mov_reg,mov_reg,mov_reg,mov_reg,mov_reg,mov_reg")
(set_attr "mode" "DI")
(set_attr "fp" "*,*,*,*,*,yes,*,yes,*,*,yes,yes,yes,*")
(set_attr "simd" "*,*,*,*,*,*,*,*,*,*,*,*,*,yes")]
&& UINTVAL (operands[1]) % 16 == 0"
"movk\\t%<w>0, %X2, lsl %1"
[(set_attr "v8type" "movk")
+ (set_attr "type" "mov_imm")
(set_attr "mode" "<MODE>")]
)
str\\t%q1, %0"
[(set_attr "v8type" "move2,fmovi2f,fmovf2i,*, \
load2,store2,store2,fpsimd_load,fpsimd_store")
+ (set_attr "type" "mov_reg,r_2_f,f_2_r,*, \
+ load2,store2,store2,f_loadd,f_stored")
(set_attr "simd_type" "*,*,*,simd_move,*,*,*,*,*")
(set_attr "mode" "DI,DI,DI,TI,DI,DI,DI,TI,TI")
(set_attr "length" "8,8,8,4,4,4,4,4,4")
[(set_attr "v8type" "fmovi2f,fmovf2i,\
fmov,fconst,fpsimd_load,\
fpsimd_store,fpsimd_load,fpsimd_store,fmov")
+ (set_attr "type" "r_2_f,f_2_r,mov_reg,fconsts,\
+ f_loads,f_stores,f_loads,f_stores,mov_reg")
(set_attr "mode" "SF")]
)
[(set_attr "v8type" "fmovi2f,fmovf2i,\
fmov,fconst,fpsimd_load,\
fpsimd_store,fpsimd_load,fpsimd_store,move")
+ (set_attr "type" "r_2_f,f_2_r,mov_reg,fconstd,\
+ f_loadd,f_stored,f_loadd,f_stored,mov_reg")
(set_attr "mode" "DF")]
)
ldp\\t%0, %H0, %1
stp\\t%1, %H1, %0"
[(set_attr "v8type" "logic,move2,fmovi2f,fmovf2i,fconst,fconst,fpsimd_load,fpsimd_store,fpsimd_load2,fpsimd_store2")
+ (set_attr "type" "arlo_reg,mov_reg,r_2_f,f_2_r,fconstd,fconstd,\
+ f_loadd,f_stored,f_loadd,f_stored")
(set_attr "mode" "DF,DF,DF,DF,DF,DF,TF,TF,DF,DF")
(set_attr "length" "4,8,8,8,4,4,4,4,4,4")
(set_attr "fp" "*,*,yes,yes,*,yes,yes,yes,*,*")
GET_MODE_SIZE (<MODE>mode)))"
"ldp\\t%<w>0, %<w>2, %1"
[(set_attr "v8type" "load2")
+ (set_attr "type" "load2")
(set_attr "mode" "<MODE>")]
)
GET_MODE_SIZE (<MODE>mode)))"
"stp\\t%<w>1, %<w>3, %0"
[(set_attr "v8type" "store2")
+ (set_attr "type" "store2")
(set_attr "mode" "<MODE>")]
)
GET_MODE_SIZE (<MODE>mode)))"
"ldp\\t%<w>0, %<w>2, %1"
[(set_attr "v8type" "fpsimd_load2")
+ (set_attr "type" "f_load<s>")
(set_attr "mode" "<MODE>")]
)
GET_MODE_SIZE (<MODE>mode)))"
"stp\\t%<w>1, %<w>3, %0"
[(set_attr "v8type" "fpsimd_load2")
+ (set_attr "type" "f_load<s>")
(set_attr "mode" "<MODE>")]
)
"INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPI:MODE>mode)"
"ldp\\t%<w>2, %<w>3, [%1], %4"
[(set_attr "v8type" "load2")
+ (set_attr "type" "load2")
(set_attr "mode" "<GPI:MODE>")]
)
"INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPI:MODE>mode)"
"stp\\t%<w>2, %<w>3, [%0, %4]!"
[(set_attr "v8type" "store2")
+ (set_attr "type" "store2")
(set_attr "mode" "<GPI:MODE>")]
)
sxtw\t%0, %w1
ldrsw\t%0, %1"
[(set_attr "v8type" "extend,load1")
+ (set_attr "type" "extend,load1")
(set_attr "mode" "DI")]
)
uxtw\t%0, %w1
ldr\t%w0, %1"
[(set_attr "v8type" "extend,load1")
+ (set_attr "type" "extend,load1")
(set_attr "mode" "DI")]
)
sxt<SHORT:size>\t%<GPI:w>0, %w1
ldrs<SHORT:size>\t%<GPI:w>0, %1"
[(set_attr "v8type" "extend,load1")
+ (set_attr "type" "extend,load1")
(set_attr "mode" "<GPI:MODE>")]
)
ldr<SHORT:size>\t%w0, %1
ldr\t%<SHORT:size>0, %1"
[(set_attr "v8type" "extend,load1,load1")
+ (set_attr "type" "extend,load1,load1")
(set_attr "mode" "<GPI:MODE>")]
)
<su>xtb\t%w0, %w1
<ldrxt>b\t%w0, %1"
[(set_attr "v8type" "extend,load1")
+ (set_attr "type" "extend,load1")
(set_attr "mode" "HI")]
)
add\\t%w0, %w1, %w2
sub\\t%w0, %w1, #%n2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_imm,arlo_reg,arlo_imm")
(set_attr "mode" "SI")]
)
add\\t%w0, %w1, %w2
sub\\t%w0, %w1, #%n2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_imm,arlo_reg,arlo_imm")
(set_attr "mode" "SI")]
)
sub\\t%x0, %x1, #%n2
add\\t%d0, %d1, %d2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_imm,arlo_reg,arlo_imm,arlo_reg")
(set_attr "mode" "DI")
(set_attr "simd" "*,*,*,yes")]
)
(define_insn "*add<mode>3_compare0"
[(set (reg:CC_NZ CC_REGNUM)
(compare:CC_NZ
- (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r")
- (match_operand:GPI 2 "aarch64_plus_operand" "rI,J"))
+ (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r,r")
+ (match_operand:GPI 2 "aarch64_plus_operand" "r,I,J"))
(const_int 0)))
- (set (match_operand:GPI 0 "register_operand" "=r,r")
+ (set (match_operand:GPI 0 "register_operand" "=r,r,r")
(plus:GPI (match_dup 1) (match_dup 2)))]
""
"@
adds\\t%<w>0, %<w>1, %<w>2
+ adds\\t%<w>0, %<w>1, %<w>2
subs\\t%<w>0, %<w>1, #%n2"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg,arlo_imm,arlo_imm")
(set_attr "mode" "<MODE>")]
)
(define_insn "*addsi3_compare0_uxtw"
[(set (reg:CC_NZ CC_REGNUM)
(compare:CC_NZ
- (plus:SI (match_operand:SI 1 "register_operand" "%r,r")
- (match_operand:SI 2 "aarch64_plus_operand" "rI,J"))
+ (plus:SI (match_operand:SI 1 "register_operand" "%r,r,r")
+ (match_operand:SI 2 "aarch64_plus_operand" "r,I,J"))
(const_int 0)))
- (set (match_operand:DI 0 "register_operand" "=r,r")
+ (set (match_operand:DI 0 "register_operand" "=r,r,r")
(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
""
"@
adds\\t%w0, %w1, %w2
+ adds\\t%w0, %w1, %w2
subs\\t%w0, %w1, #%n2"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg,arlo_imm,arlo_imm")
(set_attr "mode" "SI")]
)
""
"adds\\t%<w>0, %<w>3, %<w>1, lsl %p2"
[(set_attr "v8type" "alus_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"subs\\t%<w>0, %<w>1, %<w>2, lsl %p3"
[(set_attr "v8type" "alus_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"adds\\t%<GPI:w>0, %<GPI:w>2, %<GPI:w>1, <su>xt<ALLX:size>"
[(set_attr "v8type" "alus_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"subs\\t%<GPI:w>0, %<GPI:w>1, %<GPI:w>2, <su>xt<ALLX:size>"
[(set_attr "v8type" "alus_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
"aarch64_is_extend_from_extract (<MODE>mode, operands[2], operands[3])"
"adds\\t%<w>0, %<w>4, %<w>1, <su>xt%e3 %p2"
[(set_attr "v8type" "alus_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
"aarch64_is_extend_from_extract (<MODE>mode, operands[2], operands[3])"
"subs\\t%<w>0, %<w>4, %<w>1, <su>xt%e3 %p2"
[(set_attr "v8type" "alus_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
(define_insn "*add<mode>3nr_compare0"
[(set (reg:CC_NZ CC_REGNUM)
(compare:CC_NZ
- (plus:GPI (match_operand:GPI 0 "register_operand" "%r,r")
- (match_operand:GPI 1 "aarch64_plus_operand" "rI,J"))
+ (plus:GPI (match_operand:GPI 0 "register_operand" "%r,r,r")
+ (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J"))
(const_int 0)))]
""
"@
cmn\\t%<w>0, %<w>1
+ cmn\\t%<w>0, %<w>1
cmp\\t%<w>0, #%n1"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg,arlo_imm,arlo_imm")
(set_attr "mode" "<MODE>")]
)
""
"cmn\\t%<w>0, %<w>1"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"add\\t%<w>0, %<w>3, %<w>1, <shift> %2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"add\\t%w0, %w3, %w1, <shift> %2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")]
)
""
"add\\t%<w>0, %<w>3, %<w>1, lsl %p2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"add\\t%<GPI:w>0, %<GPI:w>2, %<GPI:w>1, <su>xt<ALLX:size>"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"add\\t%w0, %w2, %w1, <su>xt<SHORT:size>"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"add\\t%<GPI:w>0, %<GPI:w>3, %<GPI:w>1, <su>xt<ALLX:size> %2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"add\\t%w0, %w3, %w1, <su>xt<SHORT:size> %2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"add\\t%<GPI:w>0, %<GPI:w>3, %<GPI:w>1, <su>xt<ALLX:size> %p2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"add\\t%w0, %w3, %w1, <su>xt<SHORT:size> %p2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
"aarch64_is_extend_from_extract (<MODE>mode, operands[2], operands[3])"
"add\\t%<w>0, %<w>4, %<w>1, <su>xt%e3 %p2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
"aarch64_is_extend_from_extract (SImode, operands[2], operands[3])"
"add\\t%w0, %w4, %w1, <su>xt%e3 %p2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"adc\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"adc\\t%w0, %w1, %w2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"adc\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"adc\\t%w0, %w1, %w2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"adc\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"adc\\t%w0, %w1, %w2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"adc\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"adc\\t%w0, %w1, %w2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
INTVAL (operands[3])));
return \"add\t%<w>0, %<w>4, %<w>1, uxt%e3 %p2\";"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
INTVAL (operands[3])));
return \"add\t%w0, %w4, %w1, uxt%e3 %p2\";"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"sub\\t%w0, %w1, %w2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"sub\\t%w0, %w1, %w2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
sub\\t%x0, %x1, %x2
sub\\t%d0, %d1, %d2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "DI")
(set_attr "simd" "*,yes")]
)
""
"subs\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"subs\\t%w0, %w1, %w2"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"sub\\t%<w>0, %<w>3, %<w>1, <shift> %2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"sub\\t%w0, %w3, %w1, <shift> %2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")]
)
""
"sub\\t%<w>0, %<w>3, %<w>1, lsl %p2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"sub\\t%w0, %w3, %w1, lsl %p2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")]
)
""
"sub\\t%<GPI:w>0, %<GPI:w>1, %<GPI:w>2, <su>xt<ALLX:size>"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"sub\\t%w0, %w1, %w2, <su>xt<SHORT:size>"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"sub\\t%<GPI:w>0, %<GPI:w>1, %<GPI:w>2, <su>xt<ALLX:size> %3"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"sub\\t%w0, %w1, %w2, <su>xt<SHORT:size> %3"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
"aarch64_is_extend_from_extract (<MODE>mode, operands[2], operands[3])"
"sub\\t%<w>0, %<w>4, %<w>1, <su>xt%e3 %p2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
"aarch64_is_extend_from_extract (SImode, operands[2], operands[3])"
"sub\\t%w0, %w4, %w1, <su>xt%e3 %p2"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"sbc\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"sbc\\t%w0, %w1, %w2"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
INTVAL (operands[3])));
return \"sub\t%<w>0, %<w>4, %<w>1, uxt%e3 %p2\";"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
INTVAL (operands[3])));
return \"sub\t%w0, %w4, %w1, uxt%e3 %p2\";"
[(set_attr "v8type" "alu_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
DONE;
}
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "DI")]
)
neg\\t%<w>0, %<w>1
neg\\t%<rtn>0<vas>, %<rtn>1<vas>"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "simd_type" "*,simd_negabs")
(set_attr "simd" "*,yes")
(set_attr "mode" "<MODE>")
""
"neg\\t%w0, %w1"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"ngc\\t%<w>0, %<w>1"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"ngc\\t%w0, %w1"
[(set_attr "v8type" "adc")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"negs\\t%<w>0, %<w>1"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"negs\\t%w0, %w1"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"negs\\t%<w>0, %<w>1, <shift> %2"
[(set_attr "v8type" "alus_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"neg\\t%<w>0, %<w>1, <shift> %2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"neg\\t%w0, %w1, <shift> %2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")]
)
""
"neg\\t%<w>0, %<w>1, lsl %p2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"neg\\t%w0, %w1, lsl %p2"
[(set_attr "v8type" "alu_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")]
)
""
"mul\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "mult")
+ (set_attr "type" "mul")
(set_attr "mode" "<MODE>")]
)
""
"mul\\t%w0, %w1, %w2"
[(set_attr "v8type" "mult")
+ (set_attr "type" "mul")
(set_attr "mode" "SI")]
)
""
"madd\\t%<w>0, %<w>1, %<w>2, %<w>3"
[(set_attr "v8type" "madd")
+ (set_attr "type" "mul")
(set_attr "mode" "<MODE>")]
)
""
"madd\\t%w0, %w1, %w2, %w3"
[(set_attr "v8type" "madd")
+ (set_attr "type" "mul")
(set_attr "mode" "SI")]
)
""
"msub\\t%<w>0, %<w>1, %<w>2, %<w>3"
[(set_attr "v8type" "madd")
+ (set_attr "type" "mul")
(set_attr "mode" "<MODE>")]
)
""
"msub\\t%w0, %w1, %w2, %w3"
[(set_attr "v8type" "madd")
+ (set_attr "type" "mul")
(set_attr "mode" "SI")]
)
""
"mneg\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "mult")
+ (set_attr "type" "mul")
(set_attr "mode" "<MODE>")]
)
""
"mneg\\t%w0, %w1, %w2"
[(set_attr "v8type" "mult")
+ (set_attr "type" "mul")
(set_attr "mode" "SI")]
)
""
"<su>mull\\t%0, %w1, %w2"
[(set_attr "v8type" "mull")
+ (set_attr "type" "<su>mull")
(set_attr "mode" "DI")]
)
""
"<su>maddl\\t%0, %w1, %w2, %3"
[(set_attr "v8type" "maddl")
+ (set_attr "type" "mul")
(set_attr "mode" "DI")]
)
""
"<su>msubl\\t%0, %w1, %w2, %3"
[(set_attr "v8type" "maddl")
+ (set_attr "type" "mul")
(set_attr "mode" "DI")]
)
""
"<su>mnegl\\t%0, %w1, %w2"
[(set_attr "v8type" "mull")
+ (set_attr "type" "<su>mull")
(set_attr "mode" "DI")]
)
""
"<su>mulh\\t%0, %1, %2"
[(set_attr "v8type" "mulh")
+ (set_attr "type" "<su>mull")
(set_attr "mode" "DI")]
)
""
"<su>div\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "<su>div")
+ (set_attr "type" "<su>div")
(set_attr "mode" "<MODE>")]
)
""
"<su>div\\t%w0, %w1, %w2"
[(set_attr "v8type" "<su>div")
+ (set_attr "type" "<su>div")
(set_attr "mode" "SI")]
)
(define_insn "*cmp<mode>"
[(set (reg:CC CC_REGNUM)
- (compare:CC (match_operand:GPI 0 "register_operand" "r,r")
- (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")))]
+ (compare:CC (match_operand:GPI 0 "register_operand" "r,r,r")
+ (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
""
"@
cmp\\t%<w>0, %<w>1
+ cmp\\t%<w>0, %<w>1
cmn\\t%<w>0, #%n1"
[(set_attr "v8type" "alus")
+ (set_attr "type" "arlo_reg,arlo_imm,arlo_imm")
(set_attr "mode" "<MODE>")]
)
fcmp\\t%<s>0, #0.0
fcmp\\t%<s>0, %<s>1"
[(set_attr "v8type" "fcmp")
+ (set_attr "type" "fcmp<s>")
(set_attr "mode" "<MODE>")]
)
fcmpe\\t%<s>0, #0.0
fcmpe\\t%<s>0, %<s>1"
[(set_attr "v8type" "fcmp")
+ (set_attr "type" "fcmp<s>")
(set_attr "mode" "<MODE>")]
)
""
"cmp\\t%<w>2, %<w>0, <shift> %1"
[(set_attr "v8type" "alus_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"cmp\\t%<GPI:w>1, %<GPI:w>0, <su>xt<ALLX:size>"
[(set_attr "v8type" "alus_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"cmp\\t%<GPI:w>2, %<GPI:w>0, <su>xt<ALLX:size> %1"
[(set_attr "v8type" "alus_ext")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"cset\\t%<w>0, %m1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"cset\\t%w0, %m1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
""
"csetm\\t%<w>0, %m1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"csetm\\t%w0, %m1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
mov\\t%<w>0, -1
mov\\t%<w>0, 1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
mov\\t%w0, -1
mov\\t%w0, 1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
"TARGET_FLOAT"
"fcsel\\t%<s>0, %<s>3, %<s>4, %m1"
[(set_attr "v8type" "fcsel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"csinc\\t%<w>0, %<w>1, %<w>1, %M2"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
(define_insn "csinc3<mode>_insn"
""
"csinc\\t%<w>0, %<w>4, %<w>3, %M1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"csinv\\t%<w>0, %<w>4, %<w>3, %M1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
(define_insn "*csneg3<mode>_insn"
""
"csneg\\t%<w>0, %<w>4, %<w>3, %M1"
[(set_attr "v8type" "csel")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
;; -------------------------------------------------------------------
""
"<logical>\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "logic,logic_imm")
+ (set_attr "type" "arlo_reg,arlo_imm")
(set_attr "mode" "<MODE>")])
;; zero_extend version of above
""
"<logical>\\t%w0, %w1, %w2"
[(set_attr "v8type" "logic,logic_imm")
+ (set_attr "type" "arlo_reg,arlo_imm")
(set_attr "mode" "SI")])
(define_insn "*and<mode>3_compare0"
""
"ands\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "logics,logics_imm")
+ (set_attr "type" "arlo_reg,arlo_imm")
(set_attr "mode" "<MODE>")]
)
""
"ands\\t%w0, %w1, %w2"
[(set_attr "v8type" "logics,logics_imm")
+ (set_attr "type" "arlo_reg,arlo_imm")
(set_attr "mode" "SI")]
)
""
"ands\\t%<w>0, %<w>3, %<w>1, <SHIFT:shift> %2"
[(set_attr "v8type" "logics_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")]
)
""
"ands\\t%w0, %w3, %w1, <SHIFT:shift> %2"
[(set_attr "v8type" "logics_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")]
)
""
"<LOGICAL:logical>\\t%<w>0, %<w>3, %<w>1, <SHIFT:shift> %2"
[(set_attr "v8type" "logic_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")])
;; zero_extend version of above
""
"<LOGICAL:logical>\\t%w0, %w3, %w1, <SHIFT:shift> %2"
[(set_attr "v8type" "logic_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")])
(define_insn "one_cmpl<mode>2"
""
"mvn\\t%<w>0, %<w>1"
[(set_attr "v8type" "logic")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
(define_insn "*one_cmpl_<optab><mode>2"
""
"mvn\\t%<w>0, %<w>1, <shift> %2"
[(set_attr "v8type" "logic_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")])
(define_insn "*<LOGICAL:optab>_one_cmpl<mode>3"
""
"<LOGICAL:nlogical>\\t%<w>0, %<w>2, %<w>1"
[(set_attr "v8type" "logic")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
(define_insn "*and_one_cmpl<mode>3_compare0"
""
"bics\\t%<w>0, %<w>2, %<w>1"
[(set_attr "v8type" "logics")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
;; zero_extend version of above
""
"bics\\t%w0, %w2, %w1"
[(set_attr "v8type" "logics")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")])
(define_insn "*<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3"
""
"<LOGICAL:nlogical>\\t%<w>0, %<w>3, %<w>1, <SHIFT:shift> %2"
[(set_attr "v8type" "logic_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")])
(define_insn "*and_one_cmpl_<SHIFT:optab><mode>3_compare0"
""
"bics\\t%<w>0, %<w>3, %<w>1, <SHIFT:shift> %2"
[(set_attr "v8type" "logics_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")])
;; zero_extend version of above
""
"bics\\t%w0, %w3, %w1, <SHIFT:shift> %2"
[(set_attr "v8type" "logics_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "SI")])
(define_insn "clz<mode>2"
""
"clz\\t%<w>0, %<w>1"
[(set_attr "v8type" "clz")
+ (set_attr "type" "clz")
(set_attr "mode" "<MODE>")])
(define_expand "ffs<mode>2"
""
"cls\\t%<w>0, %<w>1"
[(set_attr "v8type" "clz")
+ (set_attr "type" "clz")
(set_attr "mode" "<MODE>")])
(define_insn "rbit<mode>2"
""
"rbit\\t%<w>0, %<w>1"
[(set_attr "v8type" "rbit")
+ (set_attr "type" "clz")
(set_attr "mode" "<MODE>")])
(define_expand "ctz<mode>2"
""
"tst\\t%<w>0, %<w>1"
[(set_attr "v8type" "logics")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")])
(define_insn "*and_<SHIFT:optab><mode>3nr_compare0"
""
"tst\\t%<w>2, %<w>0, <SHIFT:shift> %1"
[(set_attr "v8type" "logics_shift")
+ (set_attr "type" "arlo_shift")
(set_attr "mode" "<MODE>")])
;; -------------------------------------------------------------------
""
"<shift>\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "<MODE>")]
)
""
"<shift>\\t%w0, %w1, %w2"
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "SI")]
)
""
"lsl\\t%<w>0, %<w>1, %<w>2"
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "<MODE>")]
)
return "<bfshift>\t%w0, %w1, %2, %3";
}
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
(UINTVAL (operands[3]) + UINTVAL (operands[4]) == GET_MODE_BITSIZE (<MODE>mode))"
"extr\\t%<w>0, %<w>1, %<w>2, %4"
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "<MODE>")]
)
(UINTVAL (operands[3]) + UINTVAL (operands[4]) == 32)"
"extr\\t%w0, %w1, %w2, %4"
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "SI")]
)
return "ror\\t%<w>0, %<w>1, %3";
}
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "<MODE>")]
)
return "ror\\t%w0, %w1, %3";
}
[(set_attr "v8type" "shift")
+ (set_attr "type" "shift")
(set_attr "mode" "SI")]
)
return "<su>bfiz\t%<GPI:w>0, %<GPI:w>1, %2, %3";
}
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
return "ubfx\t%<GPI:w>0, %<GPI:w>1, %2, %3";
}
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
return "sbfx\\t%<GPI:w>0, %<GPI:w>1, %2, %3";
}
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
""
"<su>bfx\\t%<w>0, %<w>1, %3, %2"
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
> GET_MODE_BITSIZE (<MODE>mode)))"
"bfi\\t%<w>0, %<w>3, %2, %1"
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
> GET_MODE_BITSIZE (<MODE>mode)))"
"bfxil\\t%<w>0, %<w>2, %3, %1"
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
return "<su>bfiz\t%<GPI:w>0, %<GPI:w>1, %2, %3";
}
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<GPI:MODE>")]
)
&& (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0"
"ubfiz\\t%<w>0, %<w>1, %2, %P3"
[(set_attr "v8type" "bfm")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"rev\\t%<w>0, %<w>1"
[(set_attr "v8type" "rev")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"rev16\\t%w0, %w1"
[(set_attr "v8type" "rev")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "HI")]
)
""
"rev\\t%w0, %w1"
[(set_attr "v8type" "rev")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "SI")]
)
"TARGET_FLOAT"
"frint<frint_suffix>\\t%<s>0, %<s>1"
[(set_attr "v8type" "frint")
+ (set_attr "type" "f_rint<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fcvt<frint_suffix><su>\\t%<GPI:w>0, %<GPF:s>1"
[(set_attr "v8type" "fcvtf2i")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "<GPF:MODE>")
(set_attr "mode2" "<GPI:MODE>")]
)
"TARGET_FLOAT"
"fmadd\\t%<s>0, %<s>1, %<s>2, %<s>3"
[(set_attr "v8type" "fmadd")
+ (set_attr "type" "fmac<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fmsub\\t%<s>0, %<s>1, %<s>2, %<s>3"
[(set_attr "v8type" "fmadd")
+ (set_attr "type" "fmac<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fnmsub\\t%<s>0, %<s>1, %<s>2, %<s>3"
[(set_attr "v8type" "fmadd")
+ (set_attr "type" "fmac<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fnmadd\\t%<s>0, %<s>1, %<s>2, %<s>3"
[(set_attr "v8type" "fmadd")
+ (set_attr "type" "fmac<s>")
(set_attr "mode" "<MODE>")]
)
"!HONOR_SIGNED_ZEROS (<MODE>mode) && TARGET_FLOAT"
"fnmadd\\t%<s>0, %<s>1, %<s>2, %<s>3"
[(set_attr "v8type" "fmadd")
+ (set_attr "type" "fmac<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fcvt\\t%d0, %s1"
[(set_attr "v8type" "fcvt")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "DF")
(set_attr "mode2" "SF")]
)
"TARGET_FLOAT"
"fcvt\\t%s0, %d1"
[(set_attr "v8type" "fcvt")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "SF")
(set_attr "mode2" "DF")]
)
"TARGET_FLOAT"
"fcvtzs\\t%<GPI:w>0, %<GPF:s>1"
[(set_attr "v8type" "fcvtf2i")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "<GPF:MODE>")
(set_attr "mode2" "<GPI:MODE>")]
)
"TARGET_FLOAT"
"fcvtzu\\t%<GPI:w>0, %<GPF:s>1"
[(set_attr "v8type" "fcvtf2i")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "<GPF:MODE>")
(set_attr "mode2" "<GPI:MODE>")]
)
"TARGET_FLOAT"
"scvtf\\t%<GPF:s>0, %<GPI:w>1"
[(set_attr "v8type" "fcvti2f")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "<GPF:MODE>")
(set_attr "mode2" "<GPI:MODE>")]
)
"TARGET_FLOAT"
"ucvtf\\t%<GPF:s>0, %<GPI:w>1"
[(set_attr "v8type" "fcvt")
+ (set_attr "type" "f_cvt")
(set_attr "mode" "<GPF:MODE>")
(set_attr "mode2" "<GPI:MODE>")]
)
"TARGET_FLOAT"
"fadd\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fadd")
+ (set_attr "type" "fadd<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fsub\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fadd")
+ (set_attr "type" "fadd<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fmul\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fmul")
+ (set_attr "type" "fmul<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fnmul\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fmul")
+ (set_attr "type" "fmul<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fdiv\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fdiv")
+ (set_attr "type" "fdiv<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fneg\\t%<s>0, %<s>1"
[(set_attr "v8type" "ffarith")
+ (set_attr "type" "ffarith<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fsqrt\\t%<s>0, %<s>1"
[(set_attr "v8type" "fsqrt")
+ (set_attr "type" "fdiv<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fabs\\t%<s>0, %<s>1"
[(set_attr "v8type" "ffarith")
+ (set_attr "type" "ffarith<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fmaxnm\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fminmax")
+ (set_attr "type" "f_minmax<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"fminnm\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "fminmax")
+ (set_attr "type" "f_minmax<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"frecp<FRECP:frecp_suffix>\\t%<s>0, %<s>1"
[(set_attr "v8type" "frecp<FRECP:frecp_suffix>")
+ (set_attr "type" "ffarith<s>")
(set_attr "mode" "<MODE>")]
)
"TARGET_FLOAT"
"frecps\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "frecps")
+ (set_attr "type" "ffarith<s>")
(set_attr "mode" "<MODE>")]
)
"reload_completed || reload_in_progress"
"fmov\\t%x0, %d1"
[(set_attr "v8type" "fmovf2i")
+ (set_attr "type" "f_2_r")
(set_attr "mode" "DI")
(set_attr "length" "4")
])
"reload_completed || reload_in_progress"
"fmov\\t%x0, %1.d[1]"
[(set_attr "v8type" "fmovf2i")
+ (set_attr "type" "f_2_r")
(set_attr "mode" "DI")
(set_attr "length" "4")
])
"reload_completed || reload_in_progress"
"fmov\\t%0.d[1], %x1"
[(set_attr "v8type" "fmovi2f")
+ (set_attr "type" "r_2_f")
(set_attr "mode" "DI")
(set_attr "length" "4")
])
"reload_completed || reload_in_progress"
"fmov\\t%d0, %x1"
[(set_attr "v8type" "fmovi2f")
+ (set_attr "type" "r_2_f")
(set_attr "mode" "DI")
(set_attr "length" "4")
])
"reload_completed || reload_in_progress"
"fmov\\t%d0, %d1"
[(set_attr "v8type" "fmovi2f")
+ (set_attr "type" "r_2_f")
(set_attr "mode" "DI")
(set_attr "length" "4")
])
""
"add\\t%<w>0, %<w>1, :lo12:%a2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "<MODE>")]
)
""
"ldr\\t%<w>0, [%1, #:got_lo12:%a2]"
[(set_attr "v8type" "load1")
+ (set_attr "type" "load1")
(set_attr "mode" "<MODE>")]
)
"TARGET_ILP32"
"ldr\\t%w0, [%1, #:got_lo12:%a2]"
[(set_attr "v8type" "load1")
+ (set_attr "type" "load1")
(set_attr "mode" "DI")]
)
""
"ldr\\t%0, %L1"
[(set_attr "v8type" "load1")
+ (set_attr "type" "load1")
(set_attr "mode" "DI")]
)
""
"mrs\\t%0, tpidr_el0"
[(set_attr "v8type" "mrs")
+ (set_attr "type" "mov_reg")
(set_attr "mode" "DI")]
)
""
"adrp\\tx0, %A1\;add\\tx0, x0, %L1\;bl\\t%2\;nop"
[(set_attr "v8type" "call")
+ (set_attr "type" "call")
(set_attr "length" "16")])
(define_insn "tlsie_small"
""
"adrp\\t%0, %A1\;ldr\\t%0, [%0, #%L1]"
[(set_attr "v8type" "load1")
+ (set_attr "type" "load1")
(set_attr "mode" "DI")
(set_attr "length" "8")]
)
""
"add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2"
[(set_attr "v8type" "alu")
+ (set_attr "type" "arlo_reg")
(set_attr "mode" "DI")
(set_attr "length" "8")]
)
"TARGET_TLS_DESC"
"adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
[(set_attr "v8type" "call")
+ (set_attr "type" "call")
(set_attr "length" "16")])
(define_insn "stack_tie"