/*
- * (C) Copyright 2007
- * Byungjae Lee, Samsung Erectronics, bjlee@samsung.com.
- * - only support for S3C6400
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
+ * (C) Copyright 2009 SAMSUNG Electronics
+ * Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* MA 02111-1307 USA
*/
-/************************************************
- * NAME : s3c6400.h
- *
- * Based on S3C6400 User's manual Rev 0.0
- ************************************************/
-
-#ifndef __S3C6400_H__
-#define __S3C6400_H__
+#ifndef __S5PC100_H__
+#define __S5PC100_H__
#define S3C64XX_UART_CHANNELS 3
#define S3C64XX_SPI_CHANNELS 2
*/
#define ELFIN_GPIO_BASE 0xE0300000
-#define GPACON_OFFSET 0x00
-#define GPADAT_OFFSET 0x04
-#define GPAPUD_OFFSET 0x08
-#define GPACONSLP_OFFSET 0x0C
-#define GPAPUDSLP_OFFSET 0x10
-#define GPBCON_OFFSET 0x20
-#define GPBDAT_OFFSET 0x24
-#define GPBPUD_OFFSET 0x28
-#define GPBCONSLP_OFFSET 0x2C
-#define GPBPUDSLP_OFFSET 0x30
-#define GPCCON_OFFSET 0x40
-#define GPCDAT_OFFSET 0x44
-#define GPCPUD_OFFSET 0x48
-#define GPCCONSLP_OFFSET 0x4C
-#define GPCPUDSLP_OFFSET 0x50
-#define GPDCON_OFFSET 0x60
-#define GPDDAT_OFFSET 0x64
-#define GPDPUD_OFFSET 0x68
-#define GPDCONSLP_OFFSET 0x6C
-#define GPDPUDSLP_OFFSET 0x70
-#define GPECON_OFFSET 0x80
-#define GPEDAT_OFFSET 0x84
-#define GPEPUD_OFFSET 0x88
-#define GPECONSLP_OFFSET 0x8C
-#define GPEPUDSLP_OFFSET 0x90
-#define GPFCON_OFFSET 0xA0
-#define GPFDAT_OFFSET 0xA4
-#define GPFPUD_OFFSET 0xA8
-#define GPFCONSLP_OFFSET 0xAC
-#define GPFPUDSLP_OFFSET 0xB0
-#define GPGCON_OFFSET 0xC0
-#define GPGDAT_OFFSET 0xC4
-#define GPGPUD_OFFSET 0xC8
-#define GPGCONSLP_OFFSET 0xCC
-#define GPGPUDSLP_OFFSET 0xD0
-#define GPHCON0_OFFSET 0xE0
-#define GPHCON1_OFFSET 0xE4
-#define GPHDAT_OFFSET 0xE8
-#define GPHPUD_OFFSET 0xEC
-#define GPHCONSLP_OFFSET 0xF0
-#define GPHPUDSLP_OFFSET 0xF4
-#define GPICON_OFFSET 0x100
-#define GPIDAT_OFFSET 0x104
-#define GPIPUD_OFFSET 0x108
-#define GPICONSLP_OFFSET 0x10C
-#define GPIPUDSLP_OFFSET 0x110
-#define GPJCON_OFFSET 0x120
-#define GPJDAT_OFFSET 0x124
-#define GPJPUD_OFFSET 0x128
-#define GPJCONSLP_OFFSET 0x12C
-#define GPJPUDSLP_OFFSET 0x130
-#define MEM0DRVCON_OFFSET 0x1D0
-#define MEM1DRVCON_OFFSET 0x1D4
-#define GPKCON0_OFFSET 0x800
-#define GPKCON1_OFFSET 0x804
-#define GPKDAT_OFFSET 0x808
-#define GPKPUD_OFFSET 0x80C
-#define GPLCON0_OFFSET 0x810
-#define GPLCON1_OFFSET 0x814
-#define GPLDAT_OFFSET 0x818
-#define GPLPUD_OFFSET 0x81C
-#define GPMCON_OFFSET 0x820
-#define GPMDAT_OFFSET 0x824
-#define GPMPUD_OFFSET 0x828
-#define GPNCON_OFFSET 0x830
-#define GPNDAT_OFFSET 0x834
-#define GPNPUD_OFFSET 0x838
-#define GPOCON_OFFSET 0x140
-#define GPODAT_OFFSET 0x144
-#define GPOPUD_OFFSET 0x148
-#define GPOCONSLP_OFFSET 0x14C
-#define GPOPUDSLP_OFFSET 0x150
-#define GPPCON_OFFSET 0x160
-#define GPPDAT_OFFSET 0x164
-#define GPPPUD_OFFSET 0x168
-#define GPPCONSLP_OFFSET 0x16C
-#define GPPPUDSLP_OFFSET 0x170
-#define GPQCON_OFFSET 0x180
-#define GPQDAT_OFFSET 0x184
-#define GPQPUD_OFFSET 0x188
-#define GPQCONSLP_OFFSET 0x18C
-#define GPQPUDSLP_OFFSET 0x190
+#define GPX_OFFSET(x) (x * 0x20)
+
+#define CON_OFFSET(x) (GPX_OFFSET(x) + 0x00)
+#define DAT_OFFSET(x) (GPX_OFFSET(x) + 0x04)
+#define PUD_OFFSET(x) (GPX_OFFSET(x) + 0x08)
+#define DRV_OFFSET(x) (GPX_OFFSET(x) + 0x0C)
+#define PDNCON_OFFSET(x) (GPX_OFFSET(x) + 0x10)
+#define PDNPULL_OFFSET(x) (GPX_OFFSET(x) + 0x14)
+
+#define GPX_CON(x) (ELFIN_GPIO_BASE + CON_OFFSET(x))
+#define GPX_DAT(x) (ELFIN_GPIO_BASE + DAT_OFFSET(x))
+#define GPX_PUD(x) (ELFIN_GPIO_BASE + PUD_OFFSET(x))
+#define GPX_PDNCON(x) (ELFIN_GPIO_BASE + PDNCON_OFFSET(x))
+#define GPX_PDNPULL(x) (ELFIN_GPIO_BASE + PDNPULL_OFFSET(x))
+
+#define GPA0CON_OFFSET CON_OFFSET(0x0)
+#define GPA0DAT_OFFSET DAT_OFFSET(0x0)
+#define GPA0PUD_OFFSET PUD_OFFSET(0x0)
+#define GPA0DRV_OFFSET DRV_OFFSET(0x0)
+#define GPA0PDNCON_OFFSET PDNCON_OFFSET(0x0)
+#define GPA0PDNPULL_OFFSET PDNPULL_OFFSET(0x0)
+#define GPA1CON_OFFSET CON_OFFSET(0x1)
+#define GPA1DAT_OFFSET DAT_OFFSET(0x1)
+#define GPA1PUD_OFFSET PUD_OFFSET(0x1)
+#define GPA1DRV_OFFSET DRV_OFFSET(0x1)
+#define GPA1PDNCON_OFFSET PDNCON_OFFSET(0x1)
+#define GPA1PDNPULL_OFFSET PDNPULL_OFFSET(0x1)
+#define GPBCON_OFFSET CON_OFFSET(0x2)
+#define GPBDAT_OFFSET DAT_OFFSET(0x2)
+#define GPBPUD_OFFSET PUD_OFFSET(0x2)
+#define GPBDRV_OFFSET DRV_OFFSET(0x2)
+#define GPBPDNCON_OFFSET PDNCON_OFFSET(0x2)
+#define GPBPDNPULL_OFFSET PDNPULL_OFFSET(0x2)
+#define GPCCON_OFFSET CON_OFFSET(0x3)
+#define GPCDAT_OFFSET DAT_OFFSET(0x3)
+#define GPCPUD_OFFSET PUD_OFFSET(0x3)
+#define GPCDRV_OFFSET DRV_OFFSET(0x3)
+#define GPCPDNCON_OFFSET PDNCON_OFFSET(0x3)
+#define GPCPDNPULL_OFFSET PDNPULL_OFFSET(0x3)
+#define GPDCON_OFFSET CON_OFFSET(0x4)
+#define GPDDAT_OFFSET DAT_OFFSET(0x4)
+#define GPDPUD_OFFSET PUD_OFFSET(0x4)
+#define GPDDRV_OFFSET DRV_OFFSET(0x4)
+#define GPDPDNCON_OFFSET PDNCON_OFFSET(0x4)
+#define GPDPDNPULL_OFFSET PDNPULL_OFFSET(0x4)
+#define GPE0CON_OFFSET CON_OFFSET(0x5)
+#define GPE0DAT_OFFSET DAT_OFFSET(0x5)
+#define GPE0PUD_OFFSET PUD_OFFSET(0x5)
+#define GPE0DRV_OFFSET DRV_OFFSET(0x5)
+#define GPE0PDNCON_OFFSET PDNCON_OFFSET(0x5)
+#define GPE0PDNPULL_OFFSET PDNPULL_OFFSET(0x5)
+#define GPE1CON_OFFSET CON_OFFSET(0x6)
+#define GPE1DAT_OFFSET DAT_OFFSET(0x6)
+#define GPE1PUD_OFFSET PUD_OFFSET(0x6)
+#define GPE1DRV_OFFSET DRV_OFFSET(0x6)
+#define GPE1PDNCON_OFFSET PDNCON_OFFSET(0x6)
+#define GPE1PDNPULL_OFFSET PDNPULL_OFFSET(0x6)
+#define GPF0CON_OFFSET CON_OFFSET(0x7)
+#define GPF0DAT_OFFSET DAT_OFFSET(0x7)
+#define GPF0PUD_OFFSET PUD_OFFSET(0x7)
+#define GPF0DRV_OFFSET DRV_OFFSET(0x7)
+#define GPF0PDNCON_OFFSET PDNCON_OFFSET(0x7)
+#define GPF0PDNPULL_OFFSET PDNPULL_OFFSET(0x7)
+#define GPF1CON_OFFSET CON_OFFSET(0x8)
+#define GPF1DAT_OFFSET DAT_OFFSET(0x8)
+#define GPF1PUD_OFFSET PUD_OFFSET(0x8)
+#define GPF1DRV_OFFSET DRV_OFFSET(0x8)
+#define GPF1PDNCON_OFFSET PDNCON_OFFSET(0x8)
+#define GPF1PDNPULL_OFFSET PDNPULL_OFFSET(0x8)
+#define GPF2CON_OFFSET CON_OFFSET(0x9)
+#define GPF2DAT_OFFSET DAT_OFFSET(0x9)
+#define GPF2PUD_OFFSET PUD_OFFSET(0x9)
+#define GPF2DRV_OFFSET DRV_OFFSET(0x9)
+#define GPF2PDNCON_OFFSET PDNCON_OFFSET(0x9)
+#define GPF2PDNPULL_OFFSET PDNPULL_OFFSET(0x9)
+#define GPF3CON_OFFSET CON_OFFSET(0xA)
+#define GPF3DAT_OFFSET DAT_OFFSET(0xA)
+#define GPF3PUD_OFFSET PUD_OFFSET(0xA)
+#define GPF3DRV_OFFSET DRV_OFFSET(0xA)
+#define GPF3PDNCON_OFFSET PDNCON_OFFSET(0xA)
+#define GPF3PDNPULL_OFFSET PDNPULL_OFFSET(0xA)
+#define GPG0CON_OFFSET CON_OFFSET(0xB)
+#define GPG0DAT_OFFSET DAT_OFFSET(0xB)
+#define GPG0PUD_OFFSET PUD_OFFSET(0xB)
+#define GPG0DRV_OFFSET DRV_OFFSET(0xB)
+#define GPG0PDNCON_OFFSET PDNCON_OFFSET(0xB)
+#define GPG0PDNPULL_OFFSET PDNPULL_OFFSET(0xB)
+#define GPG1CON_OFFSET CON_OFFSET(0xC)
+#define GPG1DAT_OFFSET DAT_OFFSET(0xC)
+#define GPG1PUD_OFFSET PUD_OFFSET(0xC)
+#define GPG1DRV_OFFSET DRV_OFFSET(0xC)
+#define GPG1PDNCON_OFFSET PDNCON_OFFSET(0xC)
+#define GPG1PDNPULL_OFFSET PDNPULL_OFFSET(0xC)
+#define GPG2CON_OFFSET CON_OFFSET(0xD)
+#define GPG2DAT_OFFSET DAT_OFFSET(0xD)
+#define GPG2PUD_OFFSET PUD_OFFSET(0xD)
+#define GPG2DRV_OFFSET DRV_OFFSET(0xD)
+#define GPG2PDNCON_OFFSET PDNCON_OFFSET(0xD)
+#define GPG2PDNPULL_OFFSET PDNPULL_OFFSET(0xD)
+#define GPG3CON_OFFSET CON_OFFSET(0xE)
+#define GPG3DAT_OFFSET DAT_OFFSET(0xE)
+#define GPG3PUD_OFFSET PUD_OFFSET(0xE)
+#define GPG3DRV_OFFSET DRV_OFFSET(0xE)
+#define GPG3PDNCON_OFFSET PDNCON_OFFSET(0xE)
+#define GPG3PDNPULL_OFFSET PDNPULL_OFFSET(0xE)
+#define GPICON_OFFSET CON_OFFSET(0xF)
+#define GPIDAT_OFFSET DAT_OFFSET(0xF)
+#define GPIPUD_OFFSET PUD_OFFSET(0xF)
+#define GPIDRV_OFFSET DRV_OFFSET(0xF)
+#define GPIPDNCON_OFFSET PDNCON_OFFSET(0xF)
+#define GPIPDNPULL_OFFSET PDNPULL_OFFSET(0xF)
+#define GPJ0CON_OFFSET CON_OFFSET(0x10)
+#define GPJ0DAT_OFFSET DAT_OFFSET(0x10)
+#define GPJ0PUD_OFFSET PUD_OFFSET(0x10)
+#define GPJ0DRV_OFFSET DRV_OFFSET(0x10)
+#define GPJ0PDNCON_OFFSET PDNCON_OFFSET(0x11)
+#define GPJ0PDNPULL_OFFSET PDNPULL_OFFSET(0x11)
+#define GPJ1CON_OFFSET CON_OFFSET(0x11)
+#define GPJ1DAT_OFFSET DAT_OFFSET(0x11)
+#define GPJ1PUD_OFFSET PUD_OFFSET(0x11)
+#define GPJ1DRV_OFFSET DRV_OFFSET(0x11)
+#define GPJ1PDNCON_OFFSET PDNCON_OFFSET(0x11)
+#define GPJ1PDNPULL_OFFSET PDNPULL_OFFSET(0x11)
+#define GPJ2CON_OFFSET CON_OFFSET(0x12)
+#define GPJ2DAT_OFFSET DAT_OFFSET(0x12)
+#define GPJ2PUD_OFFSET PUD_OFFSET(0x12)
+#define GPJ2DRV_OFFSET DRV_OFFSET(0x12)
+#define GPJ2PDNCON_OFFSET PDNCON_OFFSET(0x12)
+#define GPJ2PDNPULL_OFFSET PDNPULL_OFFSET(0x12)
+#define GPJ3CON_OFFSET CON_OFFSET(0x13)
+#define GPJ3DAT_OFFSET DAT_OFFSET(0x13)
+#define GPJ3PUD_OFFSET PUD_OFFSET(0x13)
+#define GPJ3DRV_OFFSET DRV_OFFSET(0x13)
+#define GPJ3PDNCON_OFFSET PDNCON_OFFSET(0x13)
+#define GPJ3PDNPULL_OFFSET PDNPULL_OFFSET(0x13)
+#define GPJ4CON_OFFSET CON_OFFSET(0x14)
+#define GPJ4DAT_OFFSET DAT_OFFSET(0x14)
+#define GPJ4PUD_OFFSET PUD_OFFSET(0x14)
+#define GPJ4DRV_OFFSET DRV_OFFSET(0x14)
+#define GPJ4PDNCON_OFFSET PDNCON_OFFSET(0x14)
+#define GPJ4PDNPULL_OFFSET PDNPULL_OFFSET(0x14)
+#define GPK0CON_OFFSET CON_OFFSET(0x15)
+#define GPK0DAT_OFFSET DAT_OFFSET(0x15)
+#define GPK0PUD_OFFSET PUD_OFFSET(0x15)
+#define GPK0DRV_OFFSET DRV_OFFSET(0x15)
+#define GPK0PDNCON_OFFSET PDNCON_OFFSET(0x15)
+#define GPK0PDNPULL_OFFSET PDNPULL_OFFSET(0x15)
+#define GPK1CON_OFFSET CON_OFFSET(0x16)
+#define GPK1DAT_OFFSET DAT_OFFSET(0x16)
+#define GPK1PUD_OFFSET PUD_OFFSET(0x16)
+#define GPK1DRV_OFFSET DRV_OFFSET(0x16)
+#define GPK1PDNCON_OFFSET PDNCON_OFFSET(0x16)
+#define GPK1PDNPULL_OFFSET PDNPULL_OFFSET(0x16)
+#define GPK2CON_OFFSET CON_OFFSET(0x17)
+#define GPK2DAT_OFFSET DAT_OFFSET(0x17)
+#define GPK2PUD_OFFSET PUD_OFFSET(0x17)
+#define GPK2DRV_OFFSET DRV_OFFSET(0x17)
+#define GPK2PDNCON_OFFSET PDNCON_OFFSET(0x17)
+#define GPK2PDNPULL_OFFSET PDNPULL_OFFSET(0x17)
+#define GPK3CON_OFFSET CON_OFFSET(0x18)
+#define GPK3DAT_OFFSET DAT_OFFSET(0x18)
+#define GPK3PUD_OFFSET PUD_OFFSET(0x18)
+#define GPK3DRV_OFFSET DRV_OFFSET(0x18)
+#define GPK3PDNCON_OFFSET PDNCON_OFFSET(0x18)
+#define GPK3PDNPULL_OFFSET PDNPULL_OFFSET(0x18)
+#define GPL0CON_OFFSET CON_OFFSET(0x19)
+#define GPL0DAT_OFFSET DAT_OFFSET(0x19)
+#define GPL0PUD_OFFSET PUD_OFFSET(0x19)
+#define GPL0DRV_OFFSET DRV_OFFSET(0x19)
+#define GPL0PDNCON_OFFSET PDNCON_OFFSET(0x19)
+#define GPL0PDNPULL_OFFSET PDNPULL_OFFSET(0x19)
+#define GPL1CON_OFFSET CON_OFFSET(0x1A)
+#define GPL1DAT_OFFSET DAT_OFFSET(0x1A)
+#define GPL1PUD_OFFSET PUD_OFFSET(0x1A)
+#define GPL1DRV_OFFSET DRV_OFFSET(0x1A)
+#define GPL1PDNCON_OFFSET PDNCON_OFFSET(0x1A)
+#define GPL1PDNPULL_OFFSET PDNPULL_OFFSET(0x1A)
+#define GPL2CON_OFFSET CON_OFFSET(0x1B)
+#define GPL2DAT_OFFSET DAT_OFFSET(0x1B)
+#define GPL2PUD_OFFSET PUD_OFFSET(0x1B)
+#define GPL2DRV_OFFSET DRV_OFFSET(0x1B)
+#define GPL2PDNCON_OFFSET PDNCON_OFFSET(0x1B)
+#define GPL2PDNPULL_OFFSET PDNPULL_OFFSET(0x1B)
+#define GPL3CON_OFFSET CON_OFFSET(0x1C)
+#define GPL3DAT_OFFSET DAT_OFFSET(0x1C)
+#define GPL3PUD_OFFSET PUD_OFFSET(0x1C)
+#define GPL3DRV_OFFSET DRV_OFFSET(0x1C)
+#define GPL3PDNCON_OFFSET PDNCON_OFFSET(0x1C)
+#define GPL3PDNPULL_OFFSET PDNPULL_OFFSET(0x1C)
+#define GPL4CON_OFFSET CON_OFFSET(0x1D)
+#define GPL4DAT_OFFSET DAT_OFFSET(0x1D)
+#define GPL4PUD_OFFSET PUD_OFFSET(0x1D)
+#define GPL4DRV_OFFSET DRV_OFFSET(0x1D)
+#define GPL4PDNCON_OFFSET PDNCON_OFFSET(0x1D)
+#define GPL4PDNPULL_OFFSET PDNPULL_OFFSET(0x1D)
#define EINTPEND_OFFSET 0xA00
-#define GPACON_REG __REG(ELFIN_GPIO_BASE + GPACON_OFFSET)
-#define GPADAT_REG __REG(ELFIN_GPIO_BASE + GPADAT_OFFSET)
-#define GPAPUD_REG __REG(ELFIN_GPIO_BASE + GPAPUD_OFFSET)
-#define GPACONSLP_REG __REG(ELFIN_GPIO_BASE + GPACONSLP_OFFSET)
-#define GPAPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET)
-#define GPBCON_REG __REG(ELFIN_GPIO_BASE + GPBCON_OFFSET)
-#define GPBDAT_REG __REG(ELFIN_GPIO_BASE + GPBDAT_OFFSET)
-#define GPBPUD_REG __REG(ELFIN_GPIO_BASE + GPBPUD_OFFSET)
-#define GPBCONSLP_REG __REG(ELFIN_GPIO_BASE + GPBCONSLP_OFFSET)
-#define GPBPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET)
-#define GPCCON_REG __REG(ELFIN_GPIO_BASE + GPCCON_OFFSET)
-#define GPCDAT_REG __REG(ELFIN_GPIO_BASE + GPCDAT_OFFSET)
-#define GPCPUD_REG __REG(ELFIN_GPIO_BASE + GPCPUD_OFFSET)
-#define GPCCONSLP_REG __REG(ELFIN_GPIO_BASE + GPCCONSLP_OFFSET)
-#define GPCPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET)
-#define GPDCON_REG __REG(ELFIN_GPIO_BASE + GPDCON_OFFSET)
-#define GPDDAT_REG __REG(ELFIN_GPIO_BASE + GPDDAT_OFFSET)
-#define GPDPUD_REG __REG(ELFIN_GPIO_BASE + GPDPUD_OFFSET)
-#define GPDCONSLP_REG __REG(ELFIN_GPIO_BASE + GPDCONSLP_OFFSET)
-#define GPDPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPDPUDSLP_OFFSET)
-#define GPECON_REG __REG(ELFIN_GPIO_BASE + GPECON_OFFSET)
-#define GPEDAT_REG __REG(ELFIN_GPIO_BASE + GPEDAT_OFFSET)
-#define GPEPUD_REG __REG(ELFIN_GPIO_BASE + GPEPUD_OFFSET)
-#define GPECONSLP_REG __REG(ELFIN_GPIO_BASE + GPECONSLP_OFFSET)
-#define GPEPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPEPUDSLP_OFFSET)
-#define GPFCON_REG __REG(ELFIN_GPIO_BASE + GPFCON_OFFSET)
-#define GPFDAT_REG __REG(ELFIN_GPIO_BASE + GPFDAT_OFFSET)
-#define GPFPUD_REG __REG(ELFIN_GPIO_BASE + GPFPUD_OFFSET)
-#define GPFCONSLP_REG __REG(ELFIN_GPIO_BASE + GPFCONSLP_OFFSET)
-#define GPFPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPFPUDSLP_OFFSET)
-#define GPGCON_REG __REG(ELFIN_GPIO_BASE + GPGCON_OFFSET)
-#define GPGDAT_REG __REG(ELFIN_GPIO_BASE + GPGDAT_OFFSET)
-#define GPGPUD_REG __REG(ELFIN_GPIO_BASE + GPGPUD_OFFSET)
-#define GPGCONSLP_REG __REG(ELFIN_GPIO_BASE + GPGCONSLP_OFFSET)
-#define GPGPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPGPUDSLP_OFFSET)
-#define GPHCON0_REG __REG(ELFIN_GPIO_BASE + GPHCON0_OFFSET)
-#define GPHCON1_REG __REG(ELFIN_GPIO_BASE + GPHCON1_OFFSET)
-#define GPHDAT_REG __REG(ELFIN_GPIO_BASE + GPHDAT_OFFSET)
-#define GPHPUD_REG __REG(ELFIN_GPIO_BASE + GPHPUD_OFFSET)
-#define GPHCONSLP_REG __REG(ELFIN_GPIO_BASE + GPHCONSLP_OFFSET)
-#define GPHPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPHPUDSLP_OFFSET)
-#define GPICON_REG __REG(ELFIN_GPIO_BASE + GPICON_OFFSET)
-#define GPIDAT_REG __REG(ELFIN_GPIO_BASE + GPIDAT_OFFSET)
-#define GPIPUD_REG __REG(ELFIN_GPIO_BASE + GPIPUD_OFFSET)
-#define GPICONSLP_REG __REG(ELFIN_GPIO_BASE + GPICONSLP_OFFSET)
-#define GPIPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPIPUDSLP_OFFSET)
-#define GPJCON_REG __REG(ELFIN_GPIO_BASE + GPJCON_OFFSET)
-#define GPJDAT_REG __REG(ELFIN_GPIO_BASE + GPJDAT_OFFSET)
-#define GPJPUD_REG __REG(ELFIN_GPIO_BASE + GPJPUD_OFFSET)
-#define GPJCONSLP_REG __REG(ELFIN_GPIO_BASE + GPJCONSLP_OFFSET)
-#define GPJPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPJPUDSLP_OFFSET)
-#define GPKCON0_REG __REG(ELFIN_GPIO_BASE + GPKCON0_OFFSET)
-#define GPKCON1_REG __REG(ELFIN_GPIO_BASE + GPKCON1_OFFSET)
-#define GPKDAT_REG __REG(ELFIN_GPIO_BASE + GPKDAT_OFFSET)
-#define GPKPUD_REG __REG(ELFIN_GPIO_BASE + GPKPUD_OFFSET)
-#define GPLCON0_REG __REG(ELFIN_GPIO_BASE + GPLCON0_OFFSET)
-#define GPLCON1_REG __REG(ELFIN_GPIO_BASE + GPLCON1_OFFSET)
-#define GPLDAT_REG __REG(ELFIN_GPIO_BASE + GPLDAT_OFFSET)
-#define GPLPUD_REG __REG(ELFIN_GPIO_BASE + GPLPUD_OFFSET)
-#define GPMCON_REG __REG(ELFIN_GPIO_BASE + GPMCON_OFFSET)
-#define GPMDAT_REG __REG(ELFIN_GPIO_BASE + GPMDAT_OFFSET)
-#define GPMPUD_REG __REG(ELFIN_GPIO_BASE + GPMPUD_OFFSET)
-#define GPNCON_REG __REG(ELFIN_GPIO_BASE + GPNCON_OFFSET)
-#define GPNDAT_REG __REG(ELFIN_GPIO_BASE + GPNDAT_OFFSET)
-#define GPNPUD_REG __REG(ELFIN_GPIO_BASE + GPNPUD_OFFSET)
-#define GPOCON_REG __REG(ELFIN_GPIO_BASE + GPOCON_OFFSET)
-#define GPODAT_REG __REG(ELFIN_GPIO_BASE + GPODAT_OFFSET)
-#define GPOPUD_REG __REG(ELFIN_GPIO_BASE + GPOPUD_OFFSET)
-#define GPOCONSLP_REG __REG(ELFIN_GPIO_BASE + GPOCONSLP_OFFSET)
-#define GPOPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPOPUDSLP_OFFSET)
-#define GPPCON_REG __REG(ELFIN_GPIO_BASE + GPPCON_OFFSET)
-#define GPPDAT_REG __REG(ELFIN_GPIO_BASE + GPPDAT_OFFSET)
-#define GPPPUD_REG __REG(ELFIN_GPIO_BASE + GPPPUD_OFFSET)
-#define GPPCONSLP_REG __REG(ELFIN_GPIO_BASE + GPPCONSLP_OFFSET)
-#define GPPPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPPPUDSLP_OFFSET)
-#define GPQCON_REG __REG(ELFIN_GPIO_BASE + GPQCON_OFFSET)
-#define GPQDAT_REG __REG(ELFIN_GPIO_BASE + GPQDAT_OFFSET)
-#define GPQPUD_REG __REG(ELFIN_GPIO_BASE + GPQPUD_OFFSET)
-#define GPQCONSLP_REG __REG(ELFIN_GPIO_BASE + GPQCONSLP_OFFSET)
-#define GPQPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPQPUDSLP_OFFSET)
-
/*
* Bus Matrix
*/
#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
#define S3C64XX_MEM_SYS_CFG_ONENAND S3C64XX_MEM_SYS_CFG_16BIT
-#define GPACON (ELFIN_GPIO_BASE + GPACON_OFFSET)
-#define GPADAT (ELFIN_GPIO_BASE + GPADAT_OFFSET)
-#define GPAPUD (ELFIN_GPIO_BASE + GPAPUD_OFFSET)
-#define GPACONSLP (ELFIN_GPIO_BASE + GPACONSLP_OFFSET)
-#define GPAPUDSLP (ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET)
-#define GPBCON (ELFIN_GPIO_BASE + GPBCON_OFFSET)
-#define GPBDAT (ELFIN_GPIO_BASE + GPBDAT_OFFSET)
-#define GPBPUD (ELFIN_GPIO_BASE + GPBPUD_OFFSET)
-#define GPBCONSLP (ELFIN_GPIO_BASE + GPBCONSLP_OFFSET)
-#define GPBPUDSLP (ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET)
-#define GPCCON (ELFIN_GPIO_BASE + GPCCON_OFFSET)
-#define GPCDAT (ELFIN_GPIO_BASE + GPCDAT_OFFSET)
-#define GPCPUD (ELFIN_GPIO_BASE + GPCPUD_OFFSET)
-#define GPCCONSLP (ELFIN_GPIO_BASE + GPCCONSLP_OFFSET)
-#define GPCPUDSLP (ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET)
-#define GPDCON (ELFIN_GPIO_BASE + GPDCON_OFFSET)
-#define GPDDAT (ELFIN_GPIO_BASE + GPDDAT_OFFSET)
-#define GPDPUD (ELFIN_GPIO_BASE + GPDPUD_OFFSET)
-#define GPDCONSLP (ELFIN_GPIO_BASE + GPDCONSLP_OFFSET)
-#define GPDPUDSLP (ELFIN_GPIO_BASE + GPDPUDSLP_OFFSET)
-#define GPECON (ELFIN_GPIO_BASE + GPECON_OFFSET)
-#define GPEDAT (ELFIN_GPIO_BASE + GPEDAT_OFFSET)
-#define GPEPUD (ELFIN_GPIO_BASE + GPEPUD_OFFSET)
-#define GPECONSLP (ELFIN_GPIO_BASE + GPECONSLP_OFFSET)
-#define GPEPUDSLP (ELFIN_GPIO_BASE + GPEPUDSLP_OFFSET)
-#define GPFCON (ELFIN_GPIO_BASE + GPFCON_OFFSET)
-#define GPFDAT (ELFIN_GPIO_BASE + GPFDAT_OFFSET)
-#define GPFPUD (ELFIN_GPIO_BASE + GPFPUD_OFFSET)
-#define GPFCONSLP (ELFIN_GPIO_BASE + GPFCONSLP_OFFSET)
-#define GPFPUDSLP (ELFIN_GPIO_BASE + GPFPUDSLP_OFFSET)
-#define GPGCON (ELFIN_GPIO_BASE + GPGCON_OFFSET)
-#define GPGDAT (ELFIN_GPIO_BASE + GPGDAT_OFFSET)
-#define GPGPUD (ELFIN_GPIO_BASE + GPGPUD_OFFSET)
-#define GPGCONSLP (ELFIN_GPIO_BASE + GPGCONSLP_OFFSET)
-#define GPGPUDSLP (ELFIN_GPIO_BASE + GPGPUDSLP_OFFSET)
-#define GPHCON0 (ELFIN_GPIO_BASE + GPHCON0_OFFSET)
-#define GPHCON1 (ELFIN_GPIO_BASE + GPHCON1_OFFSET)
-#define GPHDAT (ELFIN_GPIO_BASE + GPHDAT_OFFSET)
-#define GPHPUD (ELFIN_GPIO_BASE + GPHPUD_OFFSET)
-#define GPHCONSLP (ELFIN_GPIO_BASE + GPHCONSLP_OFFSET)
-#define GPHPUDSLP (ELFIN_GPIO_BASE + GPHPUDSLP_OFFSET)
-#define GPICON (ELFIN_GPIO_BASE + GPICON_OFFSET)
-#define GPIDAT (ELFIN_GPIO_BASE + GPIDAT_OFFSET)
-#define GPIPUD (ELFIN_GPIO_BASE + GPIPUD_OFFSET)
-#define GPICONSLP (ELFIN_GPIO_BASE + GPICONSLP_OFFSET)
-#define GPIPUDSLP (ELFIN_GPIO_BASE + GPIPUDSLP_OFFSET)
-#define GPJCON (ELFIN_GPIO_BASE + GPJCON_OFFSET)
-#define GPJDAT (ELFIN_GPIO_BASE + GPJDAT_OFFSET)
-#define GPJPUD (ELFIN_GPIO_BASE + GPJPUD_OFFSET)
-#define GPJCONSLP (ELFIN_GPIO_BASE + GPJCONSLP_OFFSET)
-#define GPJPUDSLP (ELFIN_GPIO_BASE + GPJPUDSLP_OFFSET)
-#define GPKCON0 (ELFIN_GPIO_BASE + GPKCON0_OFFSET)
-#define GPKCON1 (ELFIN_GPIO_BASE + GPKCON1_OFFSET)
-#define GPKDAT (ELFIN_GPIO_BASE + GPKDAT_OFFSET)
-#define GPKPUD (ELFIN_GPIO_BASE + GPKPUD_OFFSET)
-#define GPLCON0 (ELFIN_GPIO_BASE + GPLCON0_OFFSET)
-#define GPLCON1 (ELFIN_GPIO_BASE + GPLCON1_OFFSET)
-#define GPLDAT (ELFIN_GPIO_BASE + GPLDAT_OFFSET)
-#define GPLPUD (ELFIN_GPIO_BASE + GPLPUD_OFFSET)
-#define GPMCON (ELFIN_GPIO_BASE + GPMCON_OFFSET)
-#define GPMDAT (ELFIN_GPIO_BASE + GPMDAT_OFFSET)
-#define GPMPUD (ELFIN_GPIO_BASE + GPMPUD_OFFSET)
-#define GPNCON (ELFIN_GPIO_BASE + GPNCON_OFFSET)
-#define GPNDAT (ELFIN_GPIO_BASE + GPNDAT_OFFSET)
-#define GPNPUD (ELFIN_GPIO_BASE + GPNPUD_OFFSET)
-#define GPOCON (ELFIN_GPIO_BASE + GPOCON_OFFSET)
-#define GPODAT (ELFIN_GPIO_BASE + GPODAT_OFFSET)
-#define GPOPUD (ELFIN_GPIO_BASE + GPOPUD_OFFSET)
-#define GPOCONSLP (ELFIN_GPIO_BASE + GPOCONSLP_OFFSET)
-#define GPOPUDSLP (ELFIN_GPIO_BASE + GPOPUDSLP_OFFSET)
-#define GPPCON (ELFIN_GPIO_BASE + GPPCON_OFFSET)
-#define GPPDAT (ELFIN_GPIO_BASE + GPPDAT_OFFSET)
-#define GPPPUD (ELFIN_GPIO_BASE + GPPPUD_OFFSET)
-#define GPPCONSLP (ELFIN_GPIO_BASE + GPPCONSLP_OFFSET)
-#define GPPPUDSLP (ELFIN_GPIO_BASE + GPPPUDSLP_OFFSET)
-#define GPQCON (ELFIN_GPIO_BASE + GPQCON_OFFSET)
-#define GPQDAT (ELFIN_GPIO_BASE + GPQDAT_OFFSET)
-#define GPQPUD (ELFIN_GPIO_BASE + GPQPUD_OFFSET)
-#define GPQCONSLP (ELFIN_GPIO_BASE + GPQCONSLP_OFFSET)
-#define GPQPUDSLP (ELFIN_GPIO_BASE + GPQPUDSLP_OFFSET)
+#define GPA0CON GPX_CON(0x0)
+#define GPA0DAT GPX_DAT(0x0)
+#define GPA0PUD GPX_PUD(0x0)
+#define GPA0DRV GPX_DRV(0x0)
+#define GPA0PDNCON GPX_PDNCON(0x0)
+#define GPA0PDNPULL GPX_PDNPULL(0x0)
+#define GPA1CON GPX_CON(0x1)
+#define GPA1DAT GPX_DAT(0x1)
+#define GPA1PUD GPX_PUD(0x1)
+#define GPA1DRV GPX_DRV(0x1)
+#define GPA1PDNCON GPX_PDNCON(0x1)
+#define GPA1PDNPULL GPX_PDNPULL(0x1)
+#define GPBCON GPX_CON(0x2)
+#define GPBDAT GPX_DAT(0x2)
+#define GPBPUD GPX_PUD(0x2)
+#define GPBDRV GPX_DRV(0x2)
+#define GPBPDNCON GPX_PDNCON(0x2)
+#define GPBPDNPULL GPX_PDNPULL(0x2)
+#define GPCCON GPX_CON(0x3)
+#define GPCDAT GPX_DAT(0x3)
+#define GPCPUD GPX_PUD(0x3)
+#define GPCDRV GPX_DRV(0x3)
+#define GPCPDNCON GPX_PDNCON(0x3)
+#define GPCPDNPULL GPX_PDNPULL(0x3)
+#define GPDCON GPX_CON(0x4)
+#define GPDDAT GPX_DAT(0x4)
+#define GPDPUD GPX_PUD(0x4)
+#define GPDDRV GPX_DRV(0x4)
+#define GPDPDNCON GPX_PDNCON(0x4)
+#define GPDPDNPULL GPX_PDNPULL(0x4)
+#define GPE0CON GPX_CON(0x5)
+#define GPE0DAT GPX_DAT(0x5)
+#define GPE0PUD GPX_PUD(0x5)
+#define GPE0DRV GPX_DRV(0x5)
+#define GPE0PDNCON GPX_PDNCON(0x5)
+#define GPE0PDNPULL GPX_PDNPULL(0x5)
+#define GPE1CON GPX_CON(0x6)
+#define GPE1DAT GPX_DAT(0x6)
+#define GPE1PUD GPX_PUD(0x6)
+#define GPE1DRV GPX_DRV(0x6)
+#define GPE1PDNCON GPX_PDNCON(0x6)
+#define GPE1PDNPULL GPX_PDNPULL(0x6)
+#define GPF0CON GPX_CON(0x7)
+#define GPF0DAT GPX_DAT(0x7)
+#define GPF0PUD GPX_PUD(0x7)
+#define GPF0DRV GPX_DRV(0x7)
+#define GPF0PDNCON GPX_PDNCON(0x7)
+#define GPF0PDNPULL GPX_PDNPULL(0x7)
+#define GPF1CON GPX_CON(0x8)
+#define GPF1DAT GPX_DAT(0x8)
+#define GPF1PUD GPX_PUD(0x8)
+#define GPF1DRV GPX_DRV(0x8)
+#define GPF1PDNCON GPX_PDNCON(0x8)
+#define GPF1PDNPULL GPX_PDNPULL(0x8)
+#define GPF2CON GPX_CON(0x9)
+#define GPF2DAT GPX_DAT(0x9)
+#define GPF2PUD GPX_PUD(0x9)
+#define GPF2DRV GPX_DRV(0x9)
+#define GPF2PDNCON GPX_PDNCON(0x9)
+#define GPF2PDNPULL GPX_PDNPULL(0x9)
+#define GPF3CON GPX_CON(0xA)
+#define GPF3DAT GPX_DAT(0xA)
+#define GPF3PUD GPX_PUD(0xA)
+#define GPF3DRV GPX_DRV(0xA)
+#define GPF3PDNCON GPX_PDNCON(0xA)
+#define GPF3PDNPULL GPX_PDNPULL(0xA)
+#define GPG0CON GPX_CON(0xB)
+#define GPG0DAT GPX_DAT(0xB)
+#define GPG0PUD GPX_PUD(0xB)
+#define GPG0DRV GPX_DRV(0xB)
+#define GPG0PDNCON GPX_PDNCON(0xB)
+#define GPG0PDNPULL GPX_PDNPULL(0xB)
+#define GPG1CON GPX_CON(0xC)
+#define GPG1DAT GPX_DAT(0xC)
+#define GPG1PUD GPX_PUD(0xC)
+#define GPG1DRV GPX_DRV(0xC)
+#define GPG1PDNCON GPX_PDNCON(0xC)
+#define GPG1PDNPULL GPX_PDNPULL(0xC)
+#define GPG2CON GPX_CON(0xD)
+#define GPG2DAT GPX_DAT(0xD)
+#define GPG2PUD GPX_PUD(0xD)
+#define GPG2DRV GPX_DRV(0xD)
+#define GPG2PDNCON GPX_PDNCON(0xD)
+#define GPG2PDNPULL GPX_PDNPULL(0xD)
+#define GPG3CON GPX_CON(0xE)
+#define GPG3DAT GPX_DAT(0xE)
+#define GPG3PUD GPX_PUD(0xE)
+#define GPG3DRV GPX_DRV(0xE)
+#define GPG3PDNCON GPX_PDNCON(0xE)
+#define GPG3PDNPULL GPX_PDNPULL(0xE)
+#define GPICON GPX_CON(0xF)
+#define GPIDAT GPX_DAT(0xF)
+#define GPIPUD GPX_PUD(0xF)
+#define GPIDRV GPX_DRV(0xF)
+#define GPIPDNCON GPX_PDNCON(0xF)
+#define GPIPDNPULL GPX_PDNPULL(0xF)
+#define GPJ0CON GPX_CON(0x10)
+#define GPJ0DAT GPX_DAT(0x10)
+#define GPJ0PUD GPX_PUD(0x10)
+#define GPJ0DRV GPX_DRV(0x10)
+#define GPJ0PDNCON GPX_PDNCON(0x11)
+#define GPJ0PDNPULL GPX_PDNPULL(0x11)
+#define GPJ1CON GPX_CON(0x11)
+#define GPJ1DAT GPX_DAT(0x11)
+#define GPJ1PUD GPX_PUD(0x11)
+#define GPJ1DRV GPX_DRV(0x11)
+#define GPJ1PDNCON GPX_PDNCON(0x11)
+#define GPJ1PDNPULL GPX_PDNPULL(0x11)
+#define GPJ2CON GPX_CON(0x12)
+#define GPJ2DAT GPX_DAT(0x12)
+#define GPJ2PUD GPX_PUD(0x12)
+#define GPJ2DRV GPX_DRV(0x12)
+#define GPJ2PDNCON GPX_PDNCON(0x12)
+#define GPJ2PDNPULL GPX_PDNPULL(0x12)
+#define GPJ3CON GPX_CON(0x13)
+#define GPJ3DAT GPX_DAT(0x13)
+#define GPJ3PUD GPX_PUD(0x13)
+#define GPJ3DRV GPX_DRV(0x13)
+#define GPJ3PDNCON GPX_PDNCON(0x13)
+#define GPJ3PDNPULL GPX_PDNPULL(0x13)
+#define GPJ4CON GPX_CON(0x14)
+#define GPJ4DAT GPX_DAT(0x14)
+#define GPJ4PUD GPX_PUD(0x14)
+#define GPJ4DRV GPX_DRV(0x14)
+#define GPJ4PDNCON GPX_PDNCON(0x14)
+#define GPJ4PDNPULL GPX_PDNPULL(0x14)
+#define GPK0CON GPX_CON(0x15)
+#define GPK0DAT GPX_DAT(0x15)
+#define GPK0PUD GPX_PUD(0x15)
+#define GPK0DRV GPX_DRV(0x15)
+#define GPK0PDNCON GPX_PDNCON(0x15)
+#define GPK0PDNPULL GPX_PDNPULL(0x15)
+#define GPK1CON GPX_CON(0x16)
+#define GPK1DAT GPX_DAT(0x16)
+#define GPK1PUD GPX_PUD(0x16)
+#define GPK1DRV GPX_DRV(0x16)
+#define GPK1PDNCON GPX_PDNCON(0x16)
+#define GPK1PDNPULL GPX_PDNPULL(0x16)
+#define GPK2CON GPX_CON(0x17)
+#define GPK2DAT GPX_DAT(0x17)
+#define GPK2PUD GPX_PUD(0x17)
+#define GPK2DRV GPX_DRV(0x17)
+#define GPK2PDNCON GPX_PDNCON(0x17)
+#define GPK2PDNPULL GPX_PDNPULL(0x17)
+#define GPK3CON GPX_CON(0x18)
+#define GPK3DAT GPX_DAT(0x18)
+#define GPK3PUD GPX_PUD(0x18)
+#define GPK3DRV GPX_DRV(0x18)
+#define GPK3PDNCON GPX_PDNCON(0x18)
+#define GPK3PDNPULL GPX_PDNPULL(0x18)
+#define GPL0CON GPX_CON(0x19)
+#define GPL0DAT GPX_DAT(0x19)
+#define GPL0PUD GPX_PUD(0x19)
+#define GPL0DRV GPX_DRV(0x19)
+#define GPL0PDNCON GPX_PDNCON(0x19)
+#define GPL0PDNPULL GPX_PDNPULL(0x19)
+#define GPL1CON GPX_CON(0x1A)
+#define GPL1DAT GPX_DAT(0x1A)
+#define GPL1PUD GPX_PUD(0x1A)
+#define GPL1DRV GPX_DRV(0x1A)
+#define GPL1PDNCON GPX_PDNCON(0x1A)
+#define GPL1PDNPULL GPX_PDNPULL(0x1A)
+#define GPL2CON GPX_CON(0x1B)
+#define GPL2DAT GPX_DAT(0x1B)
+#define GPL2PUD GPX_PUD(0x1B)
+#define GPL2DRV GPX_DRV(0x1B)
+#define GPL2PDNCON GPX_PDNCON(0x1B)
+#define GPL2PDNPULL GPX_PDNPULL(0x1B)
+#define GPL3CON GPX_CON(0x1C)
+#define GPL3DAT GPX_DAT(0x1C)
+#define GPL3PUD GPX_PUD(0x1C)
+#define GPL3DRV GPX_DRV(0x1C)
+#define GPL3PDNCON GPX_PDNCON(0x1C)
+#define GPL3PDNPULL GPX_PDNPULL(0x1C)
+#define GPL4CON GPX_CON(0x1D)
+#define GPL4DAT GPX_DAT(0x1D)
+#define GPL4PUD GPX_PUD(0x1D)
+#define GPL4DRV GPX_DRV(0x1D)
+#define GPL4PDNCON GPX_PDNCON(0x1D)
+#define GPL4PDNPULL GPX_PDNPULL(0x1D)
/*
* Memory controller
projects / kernel / u-boot.git / commitdiff