}
/* Store CPU counter multiple for a particular counter set */
-static inline int stcctm(u8 set, u64 range, u64 *dest)
+enum stcctm_ctr_set {
+ EXTENDED = 0,
+ BASIC = 1,
+ PROBLEM_STATE = 2,
+ CRYPTO_ACTIVITY = 3,
+ MT_DIAG = 5,
+ MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */
+};
+static inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest)
{
int cc;
return cc;
}
-/* Store CPU counter multiple for the MT utilization counter set */
-static inline int stcctm5(u64 num, u64 *val)
-{
- int cc;
-
- asm volatile (
- " .insn rsy,0xeb0000000017,%2,5,%1\n"
- " ipm %0\n"
- " srl %0,28\n"
- : "=d" (cc)
- : "Q" (*val), "d" (num)
- : "cc", "memory");
- return cc;
-}
-
/* Query sampling information */
static inline int qsi(struct hws_qsi_info_block *info)
{
u64 delta, fac, mult, div;
int i;
- stcctm5(smp_cpu_mtid + 1, cycles_new);
+ stcctm(MT_DIAG, smp_cpu_mtid + 1, cycles_new);
cycles_old = this_cpu_ptr(mt_cycles);
fac = 1;
mult = div = 0;
__this_cpu_write(mt_scaling_jiffies, jiffies);
__this_cpu_write(mt_scaling_mult, 1);
__this_cpu_write(mt_scaling_div, 1);
- stcctm5(smp_cpu_mtid + 1, this_cpu_ptr(mt_cycles));
+ stcctm(MT_DIAG, smp_cpu_mtid + 1, this_cpu_ptr(mt_cycles));
}
}