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Remove comment
author
Steve MacLean
<sdmaclea@qti.qualcomm.com>
Fri, 28 Apr 2017 02:03:49 +0000
(22:03 -0400)
committer
GitHub
<noreply@github.com>
Fri, 28 Apr 2017 02:03:49 +0000
(22:03 -0400)
Commit migrated from https://github.com/dotnet/coreclr/commit/
8df1748f28dab626ec40eaab9801053743b150cc
src/coreclr/src/jit/emit.h
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diff --git
a/src/coreclr/src/jit/emit.h
b/src/coreclr/src/jit/emit.h
index
8744483
..
a63242f
100644
(file)
--- a/
src/coreclr/src/jit/emit.h
+++ b/
src/coreclr/src/jit/emit.h
@@
-656,7
+656,7
@@
protected:
// The instrDescCGCA struct's member keeping the GC-ness of the first return register is _idcSecondRetRegGCType.
GCtype _idGCref : 2; // GCref operand? (value is a "GCtype")
#ifdef _TARGET_ARM64_
- GCtype _idGCref2 : 2;
// GCref operand fir register 2? (value is a "GCtype")
+ GCtype _idGCref2 : 2;
#endif
// Note that we use the _idReg1 and _idReg2 fields to hold