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irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES}
author
Marc Zyngier
<maz@kernel.org>
Tue, 5 Apr 2022 18:23:24 +0000
(19:23 +0100)
committer
Marc Zyngier
<maz@kernel.org>
Wed, 4 May 2022 13:09:52 +0000
(14:09 +0100)
As we're about to expose GICR_CTLR.{IR,CES} to guests, populate
the include file with the architectural values.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Oliver Upton <oupton@google.com>
Link:
https://lore.kernel.org/r/20220405182327.205520-2-maz@kernel.org
include/linux/irqchip/arm-gic-v3.h
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diff --git
a/include/linux/irqchip/arm-gic-v3.h
b/include/linux/irqchip/arm-gic-v3.h
index
12d91f0
..
7286913
100644
(file)
--- a/
include/linux/irqchip/arm-gic-v3.h
+++ b/
include/linux/irqchip/arm-gic-v3.h
@@
-127,6
+127,8
@@
#define GICR_PIDR2 GICD_PIDR2
#define GICR_CTLR_ENABLE_LPIS (1UL << 0)
+#define GICR_CTLR_CES (1UL << 1)
+#define GICR_CTLR_IR (1UL << 2)
#define GICR_CTLR_RWP (1UL << 3)
#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff)