drm/i915/display: Implement infoframes readback for LSPCON

Implemented Infoframes enabled readback for LSPCON devices.
This will help align the implementation with state readback
infrastructure.

v2: Added proper bitmask of enabled infoframes as per Ville's
recommendation.

v3: Added pcon specific infoframe types instead of using the HSW
one's, as recommended by Ville.

v4: Addressed Ville's review comment by adding HDMI infoframe
versions directly instead of DIP wrappers.

v5: Re-ordered the patches to avoid potential break in usage,
as suggested by Ville.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-13-uma.shankar@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 303f23d..7768cf3 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -560,11 +560,64 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
                                  buf, ret);
 }
 
+static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
+{
+       int ret;
+       u32 val = 0;
+       u16 reg = LSPCON_MCA_AVI_IF_CTRL;
+
+       ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+       if (ret < 0) {
+               DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
+               return false;
+       }
+
+       return val & LSPCON_MCA_AVI_IF_KICKOFF;
+}
+
+static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
+{
+       int ret;
+       u32 val = 0;
+       u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
+
+       ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+       if (ret < 0) {
+               DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
+               return false;
+       }
+
+       return val & LSPCON_PARADE_AVI_IF_KICKOFF;
+}
+
 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
                              const struct intel_crtc_state *pipe_config)
 {
-       /* FIXME actually read this from the hw */
-       return 0;
+       struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+       struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       bool infoframes_enabled;
+       u32 val = 0;
+       u32 mask, tmp;
+
+       if (lspcon->vendor == LSPCON_VENDOR_MCA)
+               infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
+       else
+               infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
+
+       if (infoframes_enabled)
+               val |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
+
+       if (lspcon->hdr_supported) {
+               tmp = intel_de_read(dev_priv,
+                                   HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
+               mask = VIDEO_DIP_ENABLE_GMP_HSW;
+
+               if (tmp & mask)
+                       val |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
+       }
+
+       return val;
 }
 
 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)