/* we restore the process signal mask as the sigreturn should
do it (XXX: use sigsetjmp) */
sigprocmask(SIG_SETMASK, old_set, NULL);
- do_raise_exception_err(env->exception_index, env->error_code);
+ cpu_loop_exit();
} else {
/* activate soft MMU for this block */
cpu_resume_from_signal(env, puc);
return c;
}
-void
+static void
set_default_mips_dis_options (struct disassemble_info *info)
{
const struct mips_arch_choice *chosen_arch;
#endif
}
-void
+static void
parse_mips_dis_option (const char *option, unsigned int len)
{
unsigned int i, optionlen, vallen;
abort ();
}
}
-#endif
void
print_mips_disassembler_options (FILE *stream)
fprintf (stream, _("\n"));
}
+#endif
int cpu_mips_exec(CPUMIPSState *s);
CPUMIPSState *cpu_mips_init(const char *cpu_model);
-uint32_t cpu_mips_get_clock (void);
+//~ uint32_t cpu_mips_get_clock (void);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
+/* mips_timer.c */
+uint32_t cpu_mips_get_random (CPUState *env);
+uint32_t cpu_mips_get_count (CPUState *env);
+void cpu_mips_store_count (CPUState *env, uint32_t value);
+void cpu_mips_store_compare (CPUState *env, uint32_t value);
+void cpu_mips_start_count(CPUState *env);
+void cpu_mips_stop_count(CPUState *env);
+
+/* mips_int.c */
+void cpu_mips_update_irq (CPUState *env);
+
+/* helper.c */
+int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+ int mmu_idx, int is_softmmu);
+void do_interrupt (CPUState *env);
+void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
+
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->active_tc.PC = tb->pc;
int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
int flags);
-int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
- int mmu_idx, int is_softmmu);
-void do_interrupt (CPUState *env);
-void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
-
-void do_raise_exception_err (uint32_t exception, int error_code);
-void do_raise_exception (uint32_t exception);
-
-uint32_t cpu_mips_get_random (CPUState *env);
-uint32_t cpu_mips_get_count (CPUState *env);
-void cpu_mips_store_count (CPUState *env, uint32_t value);
-void cpu_mips_store_compare (CPUState *env, uint32_t value);
-void cpu_mips_start_count(CPUState *env);
-void cpu_mips_stop_count(CPUState *env);
-void cpu_mips_update_irq (CPUState *env);
void cpu_mips_clock_init (CPUState *env);
void cpu_mips_tlb_flush (CPUState *env, int flush_global);
}
}
-void cpu_mips_init_mmu (CPUState *env)
-{
-}
-
int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int mmu_idx, int is_softmmu)
{
}
}
-void do_restore_state (void *pc_ptr)
+#if !defined(CONFIG_USER_ONLY)
+static void do_restore_state (void *pc_ptr)
{
TranslationBlock *tb;
unsigned long pc = (unsigned long) pc_ptr;
cpu_restore_state (tb, env, pc, NULL);
}
}
+#endif
target_ulong do_clo (target_ulong t0)
{
{
fprintf(logfile, "Raise pending IRQs\n");
}
-#endif /* !CONFIG_USER_ONLY */
/* MIPS MT functions */
target_ulong do_mftgpr(uint32_t sel)
return t0;
}
+#endif /* !CONFIG_USER_ONLY */
void do_fork(target_ulong t0, target_ulong t1)
{