Revert "drm/amdgpu:update kernel vcn ring test"
authorSaleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Thu, 13 Jul 2023 05:16:32 +0000 (10:46 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Jul 2023 15:06:54 +0000 (11:06 -0400)
VCN FW depncencies revert it to unblock others

This reverts commit f3fa86f5c778e258cd5c01bb420d4639bb393bd0.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

index 8e83fd9..36b55d2 100644 (file)
@@ -573,15 +573,13 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
        int r, i;
 
        memset(ib, 0, sizeof(*ib));
-       /* 34 pages : 128KiB  session context buffer size and 8KiB ib msg */
-       r = amdgpu_ib_get(adev, NULL, AMDGPU_GPU_PAGE_SIZE * 34,
+       r = amdgpu_ib_get(adev, NULL, AMDGPU_GPU_PAGE_SIZE * 2,
                        AMDGPU_IB_POOL_DIRECT,
                        ib);
        if (r)
                return r;
 
        msg = (uint32_t *)AMDGPU_GPU_PAGE_ALIGN((unsigned long)ib->ptr);
-       memset(msg, 0, (AMDGPU_GPU_PAGE_SIZE * 34));
        msg[0] = cpu_to_le32(0x00000028);
        msg[1] = cpu_to_le32(0x00000038);
        msg[2] = cpu_to_le32(0x00000001);
@@ -610,15 +608,13 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
        int r, i;
 
        memset(ib, 0, sizeof(*ib));
-       /* 34 pages : 128KiB  session context buffer size and 8KiB ib msg */
-       r = amdgpu_ib_get(adev, NULL, AMDGPU_GPU_PAGE_SIZE * 34,
+       r = amdgpu_ib_get(adev, NULL, AMDGPU_GPU_PAGE_SIZE * 2,
                        AMDGPU_IB_POOL_DIRECT,
                        ib);
        if (r)
                return r;
 
        msg = (uint32_t *)AMDGPU_GPU_PAGE_ALIGN((unsigned long)ib->ptr);
-       memset(msg, 0, (AMDGPU_GPU_PAGE_SIZE * 34));
        msg[0] = cpu_to_le32(0x00000028);
        msg[1] = cpu_to_le32(0x00000018);
        msg[2] = cpu_to_le32(0x00000000);
@@ -704,7 +700,6 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
        struct amdgpu_job *job;
        struct amdgpu_ib *ib;
        uint64_t addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr);
-       uint64_t session_ctx_buf_gaddr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr + 8192);
        bool sq = amdgpu_vcn_using_unified_queue(ring);
        uint32_t *ib_checksum;
        uint32_t ib_pack_in_dw;
@@ -735,10 +730,6 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
        ib->length_dw += sizeof(struct amdgpu_vcn_decode_buffer) / 4;
        memset(decode_buffer, 0, sizeof(struct amdgpu_vcn_decode_buffer));
 
-       decode_buffer->valid_buf_flag |=
-                               cpu_to_le32(AMDGPU_VCN_CMD_FLAG_SESSION_CONTEXT_BUFFER);
-       decode_buffer->session_context_buffer_address_hi = upper_32_bits(session_ctx_buf_gaddr);
-       decode_buffer->session_context_buffer_address_lo = lower_32_bits(session_ctx_buf_gaddr);
        decode_buffer->valid_buf_flag |= cpu_to_le32(AMDGPU_VCN_CMD_FLAG_MSG_BUFFER);
        decode_buffer->msg_buffer_address_hi = cpu_to_le32(addr >> 32);
        decode_buffer->msg_buffer_address_lo = cpu_to_le32(addr);
index ba5fefd..1f1d7dc 100644 (file)
 
 #define AMDGPU_VCN_IB_FLAG_DECODE_BUFFER       0x00000001
 #define AMDGPU_VCN_CMD_FLAG_MSG_BUFFER         0x00000001
-#define AMDGPU_VCN_CMD_FLAG_SESSION_CONTEXT_BUFFER     0x00100000
 
 #define VCN_CODEC_DISABLE_MASK_AV1  (1 << 0)
 #define VCN_CODEC_DISABLE_MASK_VP9  (1 << 1)
@@ -367,9 +366,7 @@ struct amdgpu_vcn_decode_buffer {
        uint32_t valid_buf_flag;
        uint32_t msg_buffer_address_hi;
        uint32_t msg_buffer_address_lo;
-       uint32_t session_context_buffer_address_hi;
-       uint32_t session_context_buffer_address_lo;
-       uint32_t pad[28];
+       uint32_t pad[30];
 };
 
 #define VCN_BLOCK_ENCODE_DISABLE_MASK 0x80