drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically
authorAdam Ford <aford173@gmail.com>
Fri, 26 May 2023 03:05:55 +0000 (22:05 -0500)
committerNeil Armstrong <neil.armstrong@linaro.org>
Fri, 26 May 2023 07:20:41 +0000 (09:20 +0200)
Make the pll-clock-frequency optional.  If it's present, use it
to maintain backwards compatibility with existing hardware.  If it
is absent, read clock rate of "sclk_mipi" to determine the rate.
Since it can be optional, change the message from an error to
dev_info.

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-4-aford173@gmail.com
drivers/gpu/drm/bridge/samsung-dsim.c

index d0f97fd199d0ed5aacae35bdebb375cfb5600a7b..cb6a7cf68352dbc38d94b096c824ee68296d0bc0 100644 (file)
@@ -1740,11 +1740,11 @@ static const struct mipi_dsi_host_ops samsung_dsim_ops = {
 };
 
 static int samsung_dsim_of_read_u32(const struct device_node *np,
-                                   const char *propname, u32 *out_value)
+                                   const char *propname, u32 *out_value, bool optional)
 {
        int ret = of_property_read_u32(np, propname, out_value);
 
-       if (ret < 0)
+       if (ret < 0 && !optional)
                pr_err("%pOF: failed to get '%s' property\n", np, propname);
 
        return ret;
@@ -1757,19 +1757,27 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
        u32 lane_polarities[5] = { 0 };
        struct device_node *endpoint;
        int i, nr_lanes, ret;
+       struct clk *pll_clk;
 
        ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
-                                      &dsi->pll_clk_rate);
-       if (ret < 0)
-               return ret;
+                                      &dsi->pll_clk_rate, 1);
+       /* If it doesn't exist, read it from the clock instead of failing */
+       if (ret < 0) {
+               dev_dbg(dev, "Using sclk_mipi for pll clock frequency\n");
+               pll_clk = devm_clk_get(dev, "sclk_mipi");
+               if (!IS_ERR(pll_clk))
+                       dsi->pll_clk_rate = clk_get_rate(pll_clk);
+               else
+                       return PTR_ERR(pll_clk);
+       }
 
        ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
-                                      &dsi->burst_clk_rate);
+                                      &dsi->burst_clk_rate, 0);
        if (ret < 0)
                return ret;
 
        ret = samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequency",
-                                      &dsi->esc_clk_rate);
+                                      &dsi->esc_clk_rate, 0);
        if (ret < 0)
                return ret;