SVM: added tsc_offset

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4668 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 9f60738e8e64ad8723e0952dfc3cdc76e18de4ae..18cb6addd71268dcda2e201d1e2e4f39f306ee02 100644 (file)
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -119,9 +119,9 @@
 #define ID_MASK                 0x00200000
 
 /* hidden flags - used internally by qemu to represent additional cpu
-   states. Only the CPL and INHIBIT_IRQ are not redundant. We avoid
-   using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring
-   with eflags. */
+   states. Only the CPL, INHIBIT_IRQ, SMM and SVMI are not
+   redundant. We avoid using the IOPL_MASK, TF_MASK and VM_MASK bit
+   position to ease oring with eflags. */
 /* current cpl */
 #define HF_CPL_SHIFT         0
 /* true if soft mmu is being used */
@@ -543,6 +543,7 @@ typedef struct CPUX86State {
 
     target_phys_addr_t vm_hsave;
     target_phys_addr_t vm_vmcb;
+    uint64_t tsc_offset;
     uint64_t intercept;
     uint16_t intercept_cr_read;
     uint16_t intercept_cr_write;

diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index 810c4665f3b2f2494ab89abd6b298082757ebaa2..ebeeebdecd2f174fd57d0ecb7cc4cd12b8fd97cd 100644 (file)
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -3005,7 +3005,7 @@ void helper_rdtsc(void)
     }
     helper_svm_check_intercept_param(SVM_EXIT_RDTSC, 0);
 
-    val = cpu_get_tsc(env);
+    val = cpu_get_tsc(env) + env->tsc_offset;
     EAX = (uint32_t)(val);
     EDX = (uint32_t)(val >> 32);
 }
@@ -4851,6 +4851,8 @@ void helper_vmrun(int aflag, int next_eip_addend)
     /* enable intercepts */
     env->hflags |= HF_SVMI_MASK;
 
+    env->tsc_offset = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.tsc_offset));
+
     env->gdt.base  = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base));
     env->gdt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit));
 
@@ -5226,6 +5228,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
     env->intercept = 0;
     env->intercept_exceptions = 0;
     env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+    env->tsc_offset = 0;
 
     env->gdt.base  = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base));
     env->gdt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit));