/gas/ChangeLog
authorThiemo Seufer <ths@networkno.de>
Thu, 26 Sep 2002 09:56:35 +0000 (09:56 +0000)
committerThiemo Seufer <ths@networkno.de>
Thu, 26 Sep 2002 09:56:35 +0000 (09:56 +0000)
* config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
capable configuration.
(macro_build): Check for MIPS16 capability, not for actual MIPS16 code
generation.
(mips_ip): Likewise.

/gas/testsuite/ChangeLog
* gas/mips/mips-jalx.d: New file, check jalx assembly.
* gas/mips/mips-jalx.s: Likewise.
* gas/mips/mips-no-jalx.l: Likewise.
* gas/mips/mips-no-jalx.s: Likewise.
* gas/mips/mips16-jalx.d: Likewise.
* gas/mips/mips16-jalx.s: Likewise.
* gas/mips/mips.exp: Add new tests.

/opcodes/ChangeLog:
* mips-dis.c (print_insn_mips): Always allow disassembly of
32-bit jalx opcode.

12 files changed:
gas/ChangeLog
gas/config/tc-mips.c
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/mips-jalx.d [new file with mode: 0644]
gas/testsuite/gas/mips/mips-jalx.s [new file with mode: 0644]
gas/testsuite/gas/mips/mips-no-jalx.l [new file with mode: 0644]
gas/testsuite/gas/mips/mips-no-jalx.s [new file with mode: 0644]
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/mips16-jalx.d [new file with mode: 0644]
gas/testsuite/gas/mips/mips16-jalx.s [new file with mode: 0644]
opcodes/ChangeLog
opcodes/mips-dis.c

index eda63ad..d88670b 100644 (file)
@@ -1,5 +1,13 @@
 2002-09-26  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 
+       * config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
+       capable configuration.
+       (macro_build): Check for MIPS16 capability, not for actual MIPS16 code
+       generation.
+       (mips_ip): Likewise.
+
+2002-09-26  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
        * config/tc-mips.c (append_insn): Fix jump overflow check.
 
 2002-09-24  Alan Modra  <amodra@bigpond.net.au>
index bd797c4..6d0c13f 100644 (file)
@@ -284,8 +284,9 @@ static int mips_32bitmode = 0;
 #define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES)
 
 /* Return true if the given CPU supports the MIPS16 ASE.  */
-#define CPU_HAS_MIPS16(cpu)                            \
-   (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0)
+#define CPU_HAS_MIPS16(cpu)                                            \
+   (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0         \
+    || strncmp (TARGET_CANONICAL, "mips-lsi-elf", sizeof ("mips-lsi-elf") - 1) == 0)
 
 /* Return true if the given CPU supports the MIPS3D ASE.  */
 #define CPU_HAS_MIPS3D(cpu)    ((cpu) == CPU_SB1      \
@@ -2713,7 +2714,7 @@ macro_build (place, counter, ep, name, fmt, va_alist)
          && insn.insn_mo->pinfo != INSN_MACRO
          && OPCODE_IS_MEMBER (insn.insn_mo,
                               (mips_opts.isa
-                               | (mips_opts.mips16 ? INSN_MIPS16 : 0)),
+                               | (file_ase_mips16 ? INSN_MIPS16 : 0)),
                               mips_arch)
          && (mips_arch != CPU_R4650 || (insn.insn_mo->pinfo & FP_D) == 0))
        break;
@@ -7809,7 +7810,7 @@ mips_ip (str, ip)
 
       if (OPCODE_IS_MEMBER (insn,
                            (mips_opts.isa
-                            | (mips_opts.mips16 ? INSN_MIPS16 : 0)
+                            | (file_ase_mips16 ? INSN_MIPS16 : 0)
                             | (mips_opts.ase_mdmx ? INSN_MDMX : 0)
                             | (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)),
                            mips_arch))
index 159a617..70db49d 100644 (file)
@@ -1,5 +1,15 @@
 2002-09-26  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 
+       * gas/mips/mips-jalx.d: New file, check jalx assembly.
+       * gas/mips/mips-jalx.s: Likewise.
+       * gas/mips/mips-no-jalx.l: Likewise.
+       * gas/mips/mips-no-jalx.s: Likewise.
+       * gas/mips/mips16-jalx.d: Likewise.
+       * gas/mips/mips16-jalx.s: Likewise.
+       * gas/mips/mips.exp: Add new tests.
+
+2002-09-26  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
        * gas/mips/jal-range.s: Fix jump overflow check.
        * gas/mips/jal-range.l: Likewise.
 
diff --git a/gas/testsuite/gas/mips/mips-jalx.d b/gas/testsuite/gas/mips/mips-jalx.d
new file mode 100644 (file)
index 0000000..38badd6
--- /dev/null
@@ -0,0 +1,9 @@
+#objdump: -dr -mmips:4000
+#as: -mips3 -mtune=r4000 -mips16
+#name: mips jalx
+.*:     file format .*
+Disassembly of section .text:
+00000000 <.text>:
+   0:  74000000        jalx    0x0
+                       0: R_MIPS_26    external_label
+   4:  00000000        nop
diff --git a/gas/testsuite/gas/mips/mips-jalx.s b/gas/testsuite/gas/mips/mips-jalx.s
new file mode 100644 (file)
index 0000000..84cbafd
--- /dev/null
@@ -0,0 +1,3 @@
+# Test the generation of jalx opcodes
+       .set nomips16
+       jalx    external_label
diff --git a/gas/testsuite/gas/mips/mips-no-jalx.l b/gas/testsuite/gas/mips/mips-no-jalx.l
new file mode 100644 (file)
index 0000000..7c0e2fe
--- /dev/null
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*:3: Error: opcode not supported at this ISA level \(mips.*\) `jalx external_label'
diff --git a/gas/testsuite/gas/mips/mips-no-jalx.s b/gas/testsuite/gas/mips/mips-no-jalx.s
new file mode 100644 (file)
index 0000000..84cbafd
--- /dev/null
@@ -0,0 +1,3 @@
+# Test the generation of jalx opcodes
+       .set nomips16
+       jalx    external_label
index 7a05ee6..aef1908 100644 (file)
@@ -141,7 +141,13 @@ if { [istarget mips*-*-*] } then {
     }
     # The mips16 test can only be run on ELF, because only ELF
     # supports the necessary mips16 reloc.
-    if { $elf && !$no_mips16 } { run_dump_test "mips16" }
+    if { $elf && !$no_mips16 } {
+       run_dump_test "mips16"
+       # Check jalx handling
+       run_dump_test "mips16-jalx"
+       run_dump_test "mips-jalx"
+    }
+    run_list_test "mips-no-jalx" ""
     run_dump_test "delay"
     run_dump_test "nodelay"
     run_dump_test "mips4010"
diff --git a/gas/testsuite/gas/mips/mips16-jalx.d b/gas/testsuite/gas/mips/mips16-jalx.d
new file mode 100644 (file)
index 0000000..cb1cfac
--- /dev/null
@@ -0,0 +1,10 @@
+#objdump: -dr -mmips:4000 -mmips:16
+#as: -mips3 -mtune=r4000 -mips16
+#name: mips16 jalx
+.*:     file format .*
+Disassembly of section .text:
+00000000 <.text>:
+   0:  1c00 0000       jalx    0x0
+                       0: R_MIPS16_26  external_label
+   4:  6500            nop
+   6:  6500            nop
diff --git a/gas/testsuite/gas/mips/mips16-jalx.s b/gas/testsuite/gas/mips/mips16-jalx.s
new file mode 100644 (file)
index 0000000..3665df6
--- /dev/null
@@ -0,0 +1,2 @@
+# Test the generation of jalx opcodes
+       jalx    external_label
index 760d400..487530a 100644 (file)
@@ -1,3 +1,8 @@
+2002-09-26  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+       * mips-dis.c (print_insn_mips): Always allow disassembly of
+       32-bit jalx opcode.
+
 2002-09-24  Nick Clifton  <nickc@redhat.com>
 
        * po/de.po: Updated German translation.
index af44788..4ffdf99 100644 (file)
@@ -526,7 +526,9 @@ print_insn_mips (memaddr, word, info)
            {
              register const char *d;
 
-             if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor))
+             /* We always allow to disassemble the jalx instruction.  */
+             if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor)
+                 && strcmp (op->name, "jalx"))
                continue;
 
              /* Figure out instruction type and branch delay information.  */