2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+ * config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
+ capable configuration.
+ (macro_build): Check for MIPS16 capability, not for actual MIPS16 code
+ generation.
+ (mips_ip): Likewise.
+
+2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
* config/tc-mips.c (append_insn): Fix jump overflow check.
2002-09-24 Alan Modra <amodra@bigpond.net.au>
#define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES)
/* Return true if the given CPU supports the MIPS16 ASE. */
-#define CPU_HAS_MIPS16(cpu) \
- (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0)
+#define CPU_HAS_MIPS16(cpu) \
+ (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0 \
+ || strncmp (TARGET_CANONICAL, "mips-lsi-elf", sizeof ("mips-lsi-elf") - 1) == 0)
/* Return true if the given CPU supports the MIPS3D ASE. */
#define CPU_HAS_MIPS3D(cpu) ((cpu) == CPU_SB1 \
&& insn.insn_mo->pinfo != INSN_MACRO
&& OPCODE_IS_MEMBER (insn.insn_mo,
(mips_opts.isa
- | (mips_opts.mips16 ? INSN_MIPS16 : 0)),
+ | (file_ase_mips16 ? INSN_MIPS16 : 0)),
mips_arch)
&& (mips_arch != CPU_R4650 || (insn.insn_mo->pinfo & FP_D) == 0))
break;
if (OPCODE_IS_MEMBER (insn,
(mips_opts.isa
- | (mips_opts.mips16 ? INSN_MIPS16 : 0)
+ | (file_ase_mips16 ? INSN_MIPS16 : 0)
| (mips_opts.ase_mdmx ? INSN_MDMX : 0)
| (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)),
mips_arch))
2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+ * gas/mips/mips-jalx.d: New file, check jalx assembly.
+ * gas/mips/mips-jalx.s: Likewise.
+ * gas/mips/mips-no-jalx.l: Likewise.
+ * gas/mips/mips-no-jalx.s: Likewise.
+ * gas/mips/mips16-jalx.d: Likewise.
+ * gas/mips/mips16-jalx.s: Likewise.
+ * gas/mips/mips.exp: Add new tests.
+
+2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
* gas/mips/jal-range.s: Fix jump overflow check.
* gas/mips/jal-range.l: Likewise.
--- /dev/null
+#objdump: -dr -mmips:4000
+#as: -mips3 -mtune=r4000 -mips16
+#name: mips jalx
+.*: file format .*
+Disassembly of section .text:
+00000000 <.text>:
+ 0: 74000000 jalx 0x0
+ 0: R_MIPS_26 external_label
+ 4: 00000000 nop
--- /dev/null
+# Test the generation of jalx opcodes
+ .set nomips16
+ jalx external_label
--- /dev/null
+.*: Assembler messages:
+.*:3: Error: opcode not supported at this ISA level \(mips.*\) `jalx external_label'
--- /dev/null
+# Test the generation of jalx opcodes
+ .set nomips16
+ jalx external_label
}
# The mips16 test can only be run on ELF, because only ELF
# supports the necessary mips16 reloc.
- if { $elf && !$no_mips16 } { run_dump_test "mips16" }
+ if { $elf && !$no_mips16 } {
+ run_dump_test "mips16"
+ # Check jalx handling
+ run_dump_test "mips16-jalx"
+ run_dump_test "mips-jalx"
+ }
+ run_list_test "mips-no-jalx" ""
run_dump_test "delay"
run_dump_test "nodelay"
run_dump_test "mips4010"
--- /dev/null
+#objdump: -dr -mmips:4000 -mmips:16
+#as: -mips3 -mtune=r4000 -mips16
+#name: mips16 jalx
+.*: file format .*
+Disassembly of section .text:
+00000000 <.text>:
+ 0: 1c00 0000 jalx 0x0
+ 0: R_MIPS16_26 external_label
+ 4: 6500 nop
+ 6: 6500 nop
--- /dev/null
+# Test the generation of jalx opcodes
+ jalx external_label
+2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * mips-dis.c (print_insn_mips): Always allow disassembly of
+ 32-bit jalx opcode.
+
2002-09-24 Nick Clifton <nickc@redhat.com>
* po/de.po: Updated German translation.
{
register const char *d;
- if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor))
+ /* We always allow to disassemble the jalx instruction. */
+ if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor)
+ && strcmp (op->name, "jalx"))
continue;
/* Figure out instruction type and branch delay information. */