x86/PCI: irq and pci_ids patch for additional Intel Cougar Point DeviceIDs
authorSeth Heasley <seth.heasley@intel.com>
Thu, 25 Mar 2010 23:11:37 +0000 (16:11 -0700)
committerJesse Barnes <jbarnes@virtuousgeek.org>
Tue, 11 May 2010 19:01:40 +0000 (12:01 -0700)
This patch adds additional LPC Controller DeviceIDs for the Intel Cougar
Point PCH.

The DeviceIDs are defined and referenced as a range of values, the same
way Ibex Peak was implemented.

Signed-off-by: Seth Heasley <seth.heasley@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
arch/x86/pci/irq.c
include/linux/pci_ids.h

index 5d362b5..9810a0f 100644 (file)
@@ -589,8 +589,6 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
        case PCI_DEVICE_ID_INTEL_ICH10_1:
        case PCI_DEVICE_ID_INTEL_ICH10_2:
        case PCI_DEVICE_ID_INTEL_ICH10_3:
-       case PCI_DEVICE_ID_INTEL_CPT_LPC1:
-       case PCI_DEVICE_ID_INTEL_CPT_LPC2:
                r->name = "PIIX/ICH";
                r->get = pirq_piix_get;
                r->set = pirq_piix_set;
@@ -605,6 +603,13 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
                return 1;
        }
 
+       if ((device >= PCI_DEVICE_ID_INTEL_CPT_LPC_MIN) && 
+               (device <= PCI_DEVICE_ID_INTEL_CPT_LPC_MAX)) {
+               r->name = "PIIX/ICH";
+               r->get = pirq_piix_get;
+               r->set = pirq_piix_set;
+               return 1;
+       }
        return 0;
 }
 
index 9f688d2..ae66851 100644 (file)
 #define PCI_DEVICE_ID_INTEL_82845_HB   0x1a30
 #define PCI_DEVICE_ID_INTEL_IOAT       0x1a38
 #define PCI_DEVICE_ID_INTEL_CPT_SMBUS  0x1c22
-#define PCI_DEVICE_ID_INTEL_CPT_LPC1   0x1c42
-#define PCI_DEVICE_ID_INTEL_CPT_LPC2   0x1c43
+#define PCI_DEVICE_ID_INTEL_CPT_LPC_MIN        0x1c41
+#define PCI_DEVICE_ID_INTEL_CPT_LPC_MAX        0x1c5f
 #define PCI_DEVICE_ID_INTEL_82801AA_0  0x2410
 #define PCI_DEVICE_ID_INTEL_82801AA_1  0x2411
 #define PCI_DEVICE_ID_INTEL_82801AA_3  0x2413