riscv:dts:jh7110: update sdio0 config

Modify the name of some attributes of the sdio0 node

Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 1b796a41cf6d5e54266226f79906991492d5b333..987c7d8a9092e35eb353de30b8b6344090e44d45 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -297,7 +297,7 @@
        cap-sd-highspeed;
        post-power-on-delay-ms = <200>;
        pinctrl-names = "default";
-       pinctrl-0 = <&sdcard_pins>;
+       pinctrl-0 = <&sdcard0_pins>;
        //cd-gpios = <&gpio 23 0>;
        status = "okay";
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi b/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
index 58787060acaf1ee0f46cc4c926165a6a45bdcff4..f5b5a27876f31b3076f66953653a7610e435f23a 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
@@ -210,12 +210,12 @@
                };
        };
 
-       sdcard_pins: sdcard-pins {
-                sdcard-pins-rest {
+       sdcard0_pins: sdcard0-pins {
+                sdcard0-pins-rest {
                        sf,pins = <PAD_GPIO24>;
                        sf,pinmux = <PAD_GPIO24_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
-                       sf,pin-gpio-dout = <GPO_SDIO1_RST_N>;
+                       sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
        };