[POWERPC] Typo fixes interrrupt -> interrupt
authorGabriel C <nix.or.die@googlemail.com>
Wed, 1 Aug 2007 09:41:09 +0000 (19:41 +1000)
committerPaul Mackerras <paulus@samba.org>
Fri, 17 Aug 2007 01:01:51 +0000 (11:01 +1000)
This fixes some interrrupt -> interrupt typos.

Signed-off-by: Gabriel Craciunescu <nix.or.die@googlemail.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/platforms/embedded6xx/holly.c
arch/powerpc/platforms/embedded6xx/linkstation.c
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
arch/powerpc/platforms/iseries/it_lp_naca.h

index 7662091..b6de2b5 100644 (file)
@@ -135,7 +135,7 @@ static void __init holly_setup_arch(void)
 }
 
 /*
- * Interrupt setup and service.  Interrrupts on the holly come
+ * Interrupt setup and service.  Interrupts on the holly come
  * from the four external INT pins, PCI interrupts are routed via
  * PCI interrupt control registers, it generates internal IRQ23
  *
index bd5ca58..8c60e02 100644 (file)
@@ -99,7 +99,7 @@ static void __init linkstation_setup_arch(void)
 }
 
 /*
- * Interrupt setup and service.  Interrrupts on the linkstation come
+ * Interrupt setup and service.  Interrupts on the linkstation come
  * from the four PCI slots plus onboard 8241 devices: I2C, DUART.
  */
 static void __init linkstation_init_IRQ(void)
index 1e3cc69..25c29bc 100644 (file)
@@ -91,7 +91,7 @@ static void __init mpc7448_hpc2_setup_arch(void)
 }
 
 /*
- * Interrupt setup and service.  Interrrupts on the mpc7448_hpc2 come
+ * Interrupt setup and service.  Interrupts on the mpc7448_hpc2 come
  * from the four external INT pins, PCI interrupts are routed via
  * PCI interrupt control registers, it generates internal IRQ23
  *
index 9bbf589..cf6dcf6 100644 (file)
@@ -60,7 +60,7 @@ struct ItLpNaca {
        u8      xRsvd2_0[128];          // Reserved                     x00-x7F
 
 // CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
-// NB: Padding required to keep xInterrruptHdlr at x300 which is required
+// NB: Padding required to keep xInterruptHdlr at x300 which is required
 // for v4r4 PLIC.
        u8      xOldLpQueue[128];       // LP Queue needed for v4r4     100-17F
        u8      xRsvd3_0[384];          // Reserved                     180-2FF