rockchip: rk3288: Fix wrong TPL_TEXT_BASE
authorJagan Teki <jagannadh.teki@gmail.com>
Fri, 23 Feb 2018 07:43:11 +0000 (13:13 +0530)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sat, 24 Feb 2018 17:47:23 +0000 (18:47 +0100)
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So  0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.

Hexdump with overlaped bytes:
-----------------------------
0000000 0000 0000 0000 0000 0000 0000 0000 0000
0000010 0000 0000 0000 0000 0000 0000 ffff eaff

So, Fix the TEXT_BASE for proper aligned address 0xff704000

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
arch/arm/mach-rockchip/Kconfig
configs/vyasa-rk3288_defconfig

index d9218da..0adaed4 100644 (file)
@@ -77,6 +77,9 @@ if ROCKCHIP_RK3288
 config TPL_LDSCRIPT
        default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
 
+config TPL_TEXT_BASE
+       default 0xff704000
+
 endif
 
 config ROCKCHIP_RK3328
index 1a8a9a8..4c76041 100644 (file)
@@ -5,7 +5,6 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00100000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_TPL_TEXT_BASE=0xff704004
 CONFIG_TARGET_VYASA_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"