brcmfmac: fix for proper support of 160MHz bandwidth
authorArend van Spriel <arend.vanspriel@broadcom.com>
Wed, 5 Sep 2018 07:48:58 +0000 (09:48 +0200)
committerKalle Valo <kvalo@codeaurora.org>
Thu, 20 Sep 2018 12:09:30 +0000 (15:09 +0300)
Decoding of firmware channel information was not complete for 160MHz
support. This resulted in the following warning:

  WARNING: CPU: 2 PID: 2222 at .../broadcom/brcm80211/brcmutil/d11.c:196
brcmu_d11ac_decchspec+0x2e/0x100 [brcmutil]
  Modules linked in: brcmfmac(O) brcmutil(O) sha256_generic cfg80211 ...
  CPU: 2 PID: 2222 Comm: kworker/2:0 Tainted: G           O
  4.17.0-wt-testing-x64-00002-gf1bed50 #1
  Hardware name: Dell Inc. Latitude E6410/07XJP9, BIOS A07 02/15/2011
  Workqueue: events request_firmware_work_func
  RIP: 0010:brcmu_d11ac_decchspec+0x2e/0x100 [brcmutil]
  RSP: 0018:ffffc90000047bd0 EFLAGS: 00010206
  RAX: 000000000000e832 RBX: ffff8801146fe910 RCX: ffff8801146fd3c0
  RDX: 0000000000002800 RSI: 0000000000000070 RDI: ffffc90000047c30
  RBP: ffffc90000047bd0 R08: 0000000000000000 R09: ffffffffa0798c80
  R10: ffff88012bca55e0 R11: ffff880110a4ea00 R12: ffff8801146f8000
  R13: ffffc90000047c30 R14: ffff8801146fe930 R15: ffff8801138e02e0
  FS:  0000000000000000(0000) GS:ffff88012bc80000(0000) knlGS:0000000000000000
  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
  CR2: 00007f18ce8b8070 CR3: 000000000200a003 CR4: 00000000000206e0
  Call Trace:
   brcmf_setup_wiphybands+0x212/0x780 [brcmfmac]
   brcmf_cfg80211_attach+0xae2/0x11a0 [brcmfmac]
   brcmf_attach+0x1fc/0x4b0 [brcmfmac]
   ? __kmalloc+0x13c/0x1c0
   brcmf_pcie_setup+0x99b/0xe00 [brcmfmac]
   brcmf_fw_request_done+0x16a/0x1f0 [brcmfmac]
   request_firmware_work_func+0x36/0x60
   process_one_work+0x146/0x350
   worker_thread+0x4a/0x3b0
   kthread+0x102/0x140
   ? process_one_work+0x350/0x350
   ? kthread_bind+0x20/0x20
   ret_from_fork+0x35/0x40
  Code: 66 90 0f b7 07 55 48 89 e5 89 c2 88 47 02 88 47 03 66 81 e2 00 38
66 81 fa 00 18 74 6e 66 81 fa 00 20 74 39 66 81 fa 00 10 74 14 <0f>
0b 66 25 00 c0 74 20 66 3d 00 c0 75 20 c6 47 04 01 5d c3 66
  ---[ end trace 550c46682415b26d ]---
  brcmfmac: brcmf_construct_chaninfo: Ignoring unexpected firmware channel 50

This patch adds the missing stuff to properly handle this.

Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com>
Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com>
Reviewed-by: Franky Lin <franky.lin@broadcom.com>
Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c
drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h

index d8b79cb..e7584b8 100644 (file)
@@ -77,6 +77,8 @@ static u16 d11ac_bw(enum brcmu_chan_bw bw)
                return BRCMU_CHSPEC_D11AC_BW_40;
        case BRCMU_CHAN_BW_80:
                return BRCMU_CHSPEC_D11AC_BW_80;
+       case BRCMU_CHAN_BW_160:
+               return BRCMU_CHSPEC_D11AC_BW_160;
        default:
                WARN_ON(1);
        }
@@ -190,8 +192,38 @@ static void brcmu_d11ac_decchspec(struct brcmu_chan *ch)
                        break;
                }
                break;
-       case BRCMU_CHSPEC_D11AC_BW_8080:
        case BRCMU_CHSPEC_D11AC_BW_160:
+               switch (ch->sb) {
+               case BRCMU_CHAN_SB_LLL:
+                       ch->control_ch_num -= CH_70MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_LLU:
+                       ch->control_ch_num -= CH_50MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_LUL:
+                       ch->control_ch_num -= CH_30MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_LUU:
+                       ch->control_ch_num -= CH_10MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_ULL:
+                       ch->control_ch_num += CH_10MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_ULU:
+                       ch->control_ch_num += CH_30MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_UUL:
+                       ch->control_ch_num += CH_50MHZ_APART;
+                       break;
+               case BRCMU_CHAN_SB_UUU:
+                       ch->control_ch_num += CH_70MHZ_APART;
+                       break;
+               default:
+                       WARN_ON_ONCE(1);
+                       break;
+               }
+               break;
+       case BRCMU_CHSPEC_D11AC_BW_8080:
        default:
                WARN_ON_ONCE(1);
                break;
index 91fca79..dddebaa 100644 (file)
@@ -29,6 +29,8 @@
 #define CH_UPPER_SB                    0x01
 #define CH_LOWER_SB                    0x02
 #define CH_EWA_VALID                   0x04
+#define CH_70MHZ_APART                 14
+#define CH_50MHZ_APART                 10
 #define CH_30MHZ_APART                 6
 #define CH_20MHZ_APART                 4
 #define CH_10MHZ_APART                 2