i965/vs: Add support for shadow comparitors with gather4

gather4_c's argument layout is straightforward -- refz just goes on the
end.

gather4_po_c's layout however -- the array index is replaced with refz.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index f4f2bcc..ffc6822 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -309,10 +309,18 @@ vec4_generator::generate_tex(vec4_instruction *inst,
         msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
         break;
       case SHADER_OPCODE_TG4:
-         msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4;
+         if (inst->shadow_compare) {
+            msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C;
+         } else {
+            msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4;
+         }
          break;
       case SHADER_OPCODE_TG4_OFFSET:
-         msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO;
+         if (inst->shadow_compare) {
+            msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C;
+         } else {
+            msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO;
+         }
          break;
       default:
         assert(!"should not get here: invalid VS texture opcode");

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 31eda75..5b792e0 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2341,7 +2341,7 @@ vec4_visitor::visit(ir_texture *ir)
                   src_reg(0)));
       }
       /* Load the shadow comparitor */
-      if (ir->shadow_comparitor && ir->op != ir_txd) {
+      if (ir->shadow_comparitor && ir->op != ir_txd && (ir->op != ir_tg4 || !has_nonconstant_offset)) {
         emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type,
                          WRITEMASK_X),
                  shadow_comparitor));
@@ -2406,6 +2406,11 @@ vec4_visitor::visit(ir_texture *ir)
            inst->mlen += 2;
         }
       } else if (ir->op == ir_tg4 && has_nonconstant_offset) {
+         if (ir->shadow_comparitor) {
+            emit(MOV(dst_reg(MRF, param_base, ir->shadow_comparitor->type, WRITEMASK_W),
+                     shadow_comparitor));
+         }
+
          emit(MOV(dst_reg(MRF, param_base + 1, glsl_type::ivec2_type, WRITEMASK_XY),
                   offset_value));
          inst->mlen++;