Rework the KVM GIC and timer to cope with lesser HW such as
the Apple M1 SoC.
* kvm-arm64/m1:
irqchip/apple-aic: Advertise some level of vGICv3 compatibility
KVM: arm64: timer: Add support for SW-based deactivation
KVM: arm64: timer: Refactor IRQ configuration
KVM: arm64: vgic: Implement SW-driven deactivation
KVM: arm64: vgic: move irq->get_input_level into an ops structure
KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation
KVM: arm64: vgic: Be tolerant to the lack of maintenance interrupt masking
KVM: arm64: Handle physical FIQ as an IRQ while running a guest
irqchip/gic: Split vGIC probing information from the GIC code