arm64: mvebu: Add basic support for uDPU board

This adds initial support for micro-DPU (uDPU) board which is based on Armada-3720 SoC.
micro-DPU is the single-port FTTdp "distribution point unit" made by Methode Electronics
which offers complete modularity with replaceable SFP modules both for uplink and downlink
(G.hn over twisted-pair, G.hn over coax, 1G and 2.5G Ethernet over Cat-5e cable).

On-board features:
- 512 MiB DDR3
- 2 x 2.5G SFP via HSGMII SERDES interface to the A3720 SoC
- USB 2.0 Type-C connector
- 4GB eMMC
- ETSI TS 101548 reverse powering via twisted pair (RJ45) or coax (F Type)

Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Luis Torres <luis.torres@methode.com>
Cc: Scott Roberts <scott.roberts@telus.com>
Cc: Paul Arola <paul.arola@telus.com>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 876c032..ca50623 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -96,6 +96,7 @@ dtb-$(CONFIG_ARCH_MVEBU) +=                   \
        armada-3720-db.dtb                      \
        armada-3720-espressobin.dtb             \
        armada-3720-turris-mox.dtb              \
+       armada-3720-uDPU.dts                    \
        armada-375-db.dtb                       \
        armada-388-clearfog.dtb                 \
        armada-388-gp.dtb                       \

diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
new file mode 100644 (file)
index 0000000..ef178bd
--- /dev/null
+++ b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+&spi0 {
+       u-boot,dm-pre-reloc;
+
+       spi-flash@0 {
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&sdhci1 {
+       u-boot,dm-pre-reloc;
+};

diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts
new file mode 100644 (file)
index 0000000..683dac2
--- /dev/null
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device tree for the uDPU board.
+ * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
+ * Copyright (C) 2016 Marvell
+ * Copyright (C) 2018 Methode
+ * Copyright (C) 2018 Telus
+ *
+ * Vladimir Vid <vladimir.vid@sartura.hr>
+ */
+
+/dts-v1/;
+
+#include "armada-37xx.dtsi"
+#include "armada-3720-uDPU-u-boot.dtsi"
+
+/ {
+       model = "Methode uDPU Board";
+       compatible = "methode,udpu";
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+               bootargs = "console=ttyMV0,115200 earlycon=ar3700_uart,0xd0012000";
+       };
+
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               spi0 = &spi0;
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
+       };
+
+       mdio: mdio@32004 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               ethphy0: ethernet-phy@0 {
+                        reg = <0>;
+               };
+               ethphy1: ethernet-phy@1 {
+                       reg = <1>;
+               };
+       };
+
+       scsi: scsi {
+               compatible = "marvell,mvebu-scsi";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               max-id = <1>;
+               max-lun = <1>;
+               status = "okay";
+       };
+
+       i2c1: i2c@11080 {
+               compatible = "marvell,armada-3700-i2c", "simple-bus";
+               reg = <0x0 0x11080 0x0 0x80>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c2_pins>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               status = "okay";
+       };
+
+       uart1: serial@12200 {
+               compatible = "marvell,armada-3700-uart-ext";
+               reg = <0x0 0x12200 0x0 0x30>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&uart2_pins>;
+               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+               status = "okay";
+               #address-cells = <2>;
+               #size-cells = <2>;
+       };
+
+       vcc_sd_reg0: regulator@0 {
+               compatible = "regulator-gpio";
+               regulator-name = "vcc_sd0";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-type = "voltage";
+               states = <1800000 0x1
+                       3300000 0x0>;
+               gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
+       };
+
+       sfp_eth0: sfp-eth0 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c0>;
+               los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
+               mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
+               tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
+       };
+
+       sfp_eth1: sfp-eth1 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1>;
+               sfp,ethernet = <&eth1>;
+               los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
+               mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
+               tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&comphy {
+       phy0 {
+               phy-type = <PHY_TYPE_SGMII1>;
+               phy-speed = <PHY_SPEED_1_25G>;
+       };
+        phy1 {
+                phy-type = <PHY_TYPE_SGMII0>;
+                phy-speed = <PHY_SPEED_1_25G>;
+        };
+
+        phy2 {
+                phy-type = <PHY_TYPE_USB3_HOST1>;
+                phy-speed = <PHY_SPEED_5G>;
+        };
+};
+
+&eth0 {
+       pinctrl-0 = <&pcie_pins>;
+       status = "okay";
+       phy-mode = "sgmii";
+       phy = <&ethphy0>;
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&eth1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       phy = <&ethphy1>;
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
+        status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi_quad_pins>;
+
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "n25q1024a","n25q512a";
+               reg = <0>;
+               spi-max-frequency = <50000000>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <4>;
+               m25p,fast-read;
+
+               partition@0 {
+                       label = "uboot";
+                       reg = <0 0x400000>;
+               };
+       };
+};
+
+&sdhci1 {
+       non-removable;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       bus-width = <4>;
+       vqmmc-supply = <&vcc_sd_reg0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdio_pins>;
+       status = "okay";
+
+       #address-cells = <1>;
+       #size-cells = <0>;
+       mmccard: mmccard@0 {
+               compatible = "mmc-card";
+               reg = <0>;
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+       status = "okay";
+};
+
+&usb3 {
+       status = "okay";
+};

diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
index 9b0afee..f2c0a58 100644 (file)
--- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS
+++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
@@ -9,3 +9,8 @@ ESPRESSOBin BOARD
 M:     Konstantin Porotchkin <kostap@marvell.com>
 S:     Maintained
 F:     configs/mvebu_espressobin-88f3720_defconfig
+
+uDPU BOARD
+M:     Vladimir Vid <vladimir.vid@sartura.hr>
+S:     Maintained
+F:     configs/uDPU_defconfig

diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
new file mode 100644 (file)
index 0000000..53f2b6e
--- /dev/null
+++ b/configs/uDPU_defconfig
@@ -0,0 +1,94 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_MVEBU_ARMADA_37XX=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=25804800
+CONFIG_SMBIOS_PRODUCT_NAME="uDPU"
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_SPI_BOOT=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_PROMPT="uDPU>> "
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_MVEBU_BUBT=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0:4m(uboot),-(rootfs)"
+CONFIG_MAC_PARTITION=y
+CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_AHCI_MVEBU=y
+CONFIG_CLK=y
+CONFIG_CLK_MVEBU=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_XENON=y
+CONFIG_MTD=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
+CONFIG_MVNETA=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_AARDVARK=y
+CONFIG_MVEBU_COMPHY_SUPPORT=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ARMADA_37XX=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DEBUG_MVEBU_A3700_UART=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_MVEBU_A3700_UART=y
+CONFIG_MVEBU_A3700_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_LZO=y
+CONFIG_SPL_LZO=y