return true;
}
for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) {
- before = ixgbe_read_reg(&adapter->hw, reg);
+ before = ixgbevf_read_reg(&adapter->hw, reg);
ixgbe_write_reg(&adapter->hw, reg,
register_test_patterns[pat] & write);
- val = ixgbe_read_reg(&adapter->hw, reg);
+ val = ixgbevf_read_reg(&adapter->hw, reg);
if (val != (register_test_patterns[pat] & write & mask)) {
hw_dbg(&adapter->hw,
"pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
*data = 1;
return true;
}
- before = ixgbe_read_reg(&adapter->hw, reg);
+ before = ixgbevf_read_reg(&adapter->hw, reg);
ixgbe_write_reg(&adapter->hw, reg, write & mask);
- val = ixgbe_read_reg(&adapter->hw, reg);
+ val = ixgbevf_read_reg(&adapter->hw, reg);
if ((write & mask) != (val & mask)) {
pr_err("set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
reg, (val & mask), write & mask);
ixgbevf_remove_adapter(hw);
return;
}
- value = ixgbe_read_reg(hw, IXGBE_VFSTATUS);
+ value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
if (value == IXGBE_FAILED_READ_REG)
ixgbevf_remove_adapter(hw);
}
-u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
+u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
{
u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
u32 value;
}
#define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v)
-u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg);
-#define IXGBE_READ_REG(h, r) ixgbe_read_reg(h, r)
+u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg);
+#define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r)
static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg,
u32 offset, u32 value)
static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg,
u32 offset)
{
- return ixgbe_read_reg(hw, reg + (offset << 2));
+ return ixgbevf_read_reg(hw, reg + (offset << 2));
}
#define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o)