* Date: Feb. 19, 2004
*
* Functions:
- * IFRFbWriteEmbedded - Embedded write RF register via MAC
+ * vnt_rf_write_embedded - Embedded write RF register via MAC
*
* Revision History:
* RF_VT3226: RobertYu:20051111, VT3226C0 and before
* Return Value: true if succeeded; false if failed.
*
*/
-int IFRFbWriteEmbedded(struct vnt_private *priv, u32 data)
+int vnt_rf_write_embedded(struct vnt_private *priv, u32 data)
{
u8 reg_data[4];
if (priv->byCurPwr >= AL2230_PWR_IDX_LEN)
return false;
- ret &= IFRFbWriteEmbedded(priv,
+ ret &= vnt_rf_write_embedded(priv,
al2230_power_table[priv->byCurPwr]);
if (rate <= RATE_11M)
- ret &= IFRFbWriteEmbedded(priv, 0x0001b400 +
+ ret &= vnt_rf_write_embedded(priv, 0x0001b400 +
(BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW);
else
- ret &= IFRFbWriteEmbedded(priv, 0x0005a400 +
+ ret &= vnt_rf_write_embedded(priv, 0x0005a400 +
(BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW);
break;
case RF_AL2230S:
if (priv->byCurPwr >= AL2230_PWR_IDX_LEN)
return false;
- ret &= IFRFbWriteEmbedded(priv,
+ ret &= vnt_rf_write_embedded(priv,
al2230_power_table[priv->byCurPwr]);
if (rate <= RATE_11M) {
- ret &= IFRFbWriteEmbedded(priv, 0x040c1400 +
+ ret &= vnt_rf_write_embedded(priv, 0x040c1400 +
(BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW);
- ret &= IFRFbWriteEmbedded(priv, 0x00299b00 +
+ ret &= vnt_rf_write_embedded(priv, 0x00299b00 +
(BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW);
} else {
- ret &= IFRFbWriteEmbedded(priv, 0x0005a400 +
+ ret &= vnt_rf_write_embedded(priv, 0x0005a400 +
(BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW);
- ret &= IFRFbWriteEmbedded(priv, 0x00099b00 +
+ ret &= vnt_rf_write_embedded(priv, 0x00099b00 +
(BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW);
}
break;
case RF_AIROHA7230:
if (rate <= RATE_11M)
- ret &= IFRFbWriteEmbedded(priv, 0x111bb900 +
+ ret &= vnt_rf_write_embedded(priv, 0x111bb900 +
(BY_AL7230_REG_LEN << 3)+IFREGCTL_REGW);
else
- ret &= IFRFbWriteEmbedded(priv, 0x221bb900 +
+ ret &= vnt_rf_write_embedded(priv, 0x221bb900 +
(BY_AL7230_REG_LEN << 3)+IFREGCTL_REGW);
if (priv->byCurPwr > AL7230_PWR_IDX_LEN)
power_setting = 0x080c0b00 | ((priv->byCurPwr) << 12) |
(BY_AL7230_REG_LEN << 3) | IFREGCTL_REGW;
- ret &= IFRFbWriteEmbedded(priv, power_setting);
+ ret &= vnt_rf_write_embedded(priv, power_setting);
break;
power_setting = ((0x3f - priv->byCurPwr) << 20) | (0x17 << 8) |
(BY_VT3226_REG_LEN << 3) | IFREGCTL_REGW;
- ret &= IFRFbWriteEmbedded(priv, power_setting);
+ ret &= vnt_rf_write_embedded(priv, power_setting);
break;
case RF_VT3226D0:
(0xe07 << 8) | (BY_VT3226_REG_LEN << 3) |
IFREGCTL_REGW;
- ret &= IFRFbWriteEmbedded(priv, power_setting);
- ret &= IFRFbWriteEmbedded(priv, 0x03c6a200 +
+ ret &= vnt_rf_write_embedded(priv, power_setting);
+ ret &= vnt_rf_write_embedded(priv, 0x03c6a200 +
(BY_VT3226_REG_LEN<<3)+IFREGCTL_REGW);
if (priv->vnt_mgmt.eScanState != WMAC_NO_SCANNING) {
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
"RFbRawSetPower> 11B mode uCurrChannel[%d]\n",
priv->vnt_mgmt.uScanChannel);
- ret &= IFRFbWriteEmbedded(priv,
+ ret &= vnt_rf_write_embedded(priv,
vt3226d0_lo_current_table[priv->
vnt_mgmt.uScanChannel - 1]);
} else {
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
"RFbRawSetPower> 11B mode uCurrChannel[%d]\n",
priv->vnt_mgmt.uCurrChannel);
- ret &= IFRFbWriteEmbedded(priv,
+ ret &= vnt_rf_write_embedded(priv,
vt3226d0_lo_current_table[priv->
vnt_mgmt.uCurrChannel - 1]);
}
- ret &= IFRFbWriteEmbedded(priv, 0x015C0800 +
+ ret &= vnt_rf_write_embedded(priv, 0x015C0800 +
(BY_VT3226_REG_LEN<<3)+IFREGCTL_REGW);
} else {
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
(0x7 << 8) | (BY_VT3226_REG_LEN << 3) |
IFREGCTL_REGW;
- ret &= IFRFbWriteEmbedded(priv, power_setting);
- ret &= IFRFbWriteEmbedded(priv, 0x00C6A200 +
+ ret &= vnt_rf_write_embedded(priv, power_setting);
+ ret &= vnt_rf_write_embedded(priv, 0x00C6A200 +
(BY_VT3226_REG_LEN << 3) + IFREGCTL_REGW);
- ret &= IFRFbWriteEmbedded(priv, 0x016BC600 +
+ ret &= vnt_rf_write_embedded(priv, 0x016BC600 +
(BY_VT3226_REG_LEN<<3)+IFREGCTL_REGW);
- ret &= IFRFbWriteEmbedded(priv, 0x00900800 +
+ ret &= vnt_rf_write_embedded(priv, 0x00900800 +
(BY_VT3226_REG_LEN<<3)+IFREGCTL_REGW);
}
break;
(0x27 << 8) | (BY_VT3342_REG_LEN << 3) |
IFREGCTL_REGW;
- ret &= IFRFbWriteEmbedded(priv, power_setting);
+ ret &= vnt_rf_write_embedded(priv, power_setting);
break;
default: