0[0-9a-f]+ <[^>]+> f819 f00c pld \[r9, ip\]
0[0-9a-f]+ <[^>]+> f89f f006 pld \[pc, #6\] ; 0+5ee <[^>]+>
0[0-9a-f]+ <[^>]+> f81f f02a pld \[pc, #-42\] ; 0+5c2 <[^>]+>
+0[0-9a-f]+ <[^>]+> bf00 nop
0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\]
0[0-9a-f]+ <[^>]+> e9d5 230c ldrd r2, r3, \[r5, #48\].*
0[0-9a-f]+ <[^>]+> e955 230c ldrd r2, r3, \[r5, #-48\].*
+0[0-9a-f]+ <[^>]+> e95f 4505 ldrd r4, r5, \[pc, #-16\] ; 0+5f0 <^>]+>
0[0-9a-f]+ <[^>]+> e9c5 2300 strd r2, r3, \[r5\]
0[0-9a-f]+ <[^>]+> e9c5 230c strd r2, r3, \[r5, #48\].*
0[0-9a-f]+ <[^>]+> e945 230c strd r2, r3, \[r5, #-48\].*
+0[0-9a-f]+ <[^>]+> e94f 2308 strd r2, r3, \[pc, #-32\] ; 0+5f0 <^>]+>
0[0-9a-f]+ <[^>]+> f815 1e00 ldrbt r1, \[r5\]
0[0-9a-f]+ <[^>]+> f815 1e30 ldrbt r1, \[r5, #48\].*
0[0-9a-f]+ <[^>]+> f915 1e00 ldrsbt r1, \[r5\]
0[0-9a-f]+ <[^>]+> fa52 f183 uxtab r1, r2, r3
0[0-9a-f]+ <[^>]+> fa32 f183 uxtab16 r1, r2, r3
0[0-9a-f]+ <[^>]+> fa12 f183 uxtah r1, r2, r3
-0[0-9a-f]+ <[^>]+> f89f 12aa ldrb\.w r1, \[pc, #682\] ; 0+e82 <[^>]+>
-0[0-9a-f]+ <[^>]+> f89f 1155 ldrb\.w r1, \[pc, #341\] ; 0+d31 <[^>]+>
-0[0-9a-f]+ <[^>]+> f81f 12aa ldrb\.w r1, \[pc, #-682\] ; 0+936 <[^>]+>
-0[0-9a-f]+ <[^>]+> f81f 1155 ldrb\.w r1, \[pc, #-341\] ; 0+a8f <[^>]+>
-0[0-9a-f]+ <[^>]+> f99f 12aa ldrsb\.w r1, \[pc, #682\] ; 0+e92 <[^>]+>
-0[0-9a-f]+ <[^>]+> f99f 1155 ldrsb\.w r1, \[pc, #341\] ; 0+d41 <[^>]+>
-0[0-9a-f]+ <[^>]+> f91f 12aa ldrsb\.w r1, \[pc, #-682\] ; 0+946 <[^>]+>
-0[0-9a-f]+ <[^>]+> f91f 1155 ldrsb\.w r1, \[pc, #-341\] ; 0+a9f <[^>]+>
-0[0-9a-f]+ <[^>]+> f8bf 12aa ldrh\.w r1, \[pc, #682\] ; 0+ea2 <[^>]+>
-0[0-9a-f]+ <[^>]+> f8bf 1155 ldrh\.w r1, \[pc, #341\] ; 0+d51 <[^>]+>
-0[0-9a-f]+ <[^>]+> f83f 12aa ldrh\.w r1, \[pc, #-682\] ; 0+956 <[^>]+>
-0[0-9a-f]+ <[^>]+> f83f 1155 ldrh\.w r1, \[pc, #-341\] ; 0+aaf <[^>]+>
-0[0-9a-f]+ <[^>]+> f9bf 12aa ldrsh\.w r1, \[pc, #682\] ; 0+eb2 <[^>]+>
-0[0-9a-f]+ <[^>]+> f9bf 1155 ldrsh\.w r1, \[pc, #341\] ; 0+d61 <[^>]+>
-0[0-9a-f]+ <[^>]+> f93f 12aa ldrsh\.w r1, \[pc, #-682\] ; 0+966 <[^>]+>
-0[0-9a-f]+ <[^>]+> f93f 1155 ldrsh\.w r1, \[pc, #-341\] ; 0+abf <[^>]+>
-0[0-9a-f]+ <[^>]+> f8df 12aa ldr\.w r1, \[pc, #682\] ; 0+ec2 <[^>]+>
-0[0-9a-f]+ <[^>]+> f8df 1155 ldr\.w r1, \[pc, #341\] ; 0+d71 <[^>]+>
-0[0-9a-f]+ <[^>]+> f85f 12aa ldr\.w r1, \[pc, #-682\] ; 0+976 <[^>]+>
-0[0-9a-f]+ <[^>]+> f85f 1155 ldr\.w r1, \[pc, #-341\] ; 0+acf <[^>]+>
+0[0-9a-f]+ <[^>]+> f89f 12aa ldrb\.w r1, \[pc, #682\] ; 0+e8a <[^>]+>
+0[0-9a-f]+ <[^>]+> f89f 1155 ldrb\.w r1, \[pc, #341\] ; 0+d39 <[^>]+>
+0[0-9a-f]+ <[^>]+> f81f 12aa ldrb\.w r1, \[pc, #-682\] ; 0+93e <[^>]+>
+0[0-9a-f]+ <[^>]+> f81f 1155 ldrb\.w r1, \[pc, #-341\] ; 0+a97 <[^>]+>
+0[0-9a-f]+ <[^>]+> f99f 12aa ldrsb\.w r1, \[pc, #682\] ; 0+e9a <[^>]+>
+0[0-9a-f]+ <[^>]+> f99f 1155 ldrsb\.w r1, \[pc, #341\] ; 0+d49 <[^>]+>
+0[0-9a-f]+ <[^>]+> f91f 12aa ldrsb\.w r1, \[pc, #-682\] ; 0+94e <[^>]+>
+0[0-9a-f]+ <[^>]+> f91f 1155 ldrsb\.w r1, \[pc, #-341\] ; 0+aa7 <[^>]+>
+0[0-9a-f]+ <[^>]+> f8bf 12aa ldrh\.w r1, \[pc, #682\] ; 0+eaa <[^>]+>
+0[0-9a-f]+ <[^>]+> f8bf 1155 ldrh\.w r1, \[pc, #341\] ; 0+d59 <[^>]+>
+0[0-9a-f]+ <[^>]+> f83f 12aa ldrh\.w r1, \[pc, #-682\] ; 0+95e <[^>]+>
+0[0-9a-f]+ <[^>]+> f83f 1155 ldrh\.w r1, \[pc, #-341\] ; 0+ab7 <[^>]+>
+0[0-9a-f]+ <[^>]+> f9bf 12aa ldrsh\.w r1, \[pc, #682\] ; 0+eba <[^>]+>
+0[0-9a-f]+ <[^>]+> f9bf 1155 ldrsh\.w r1, \[pc, #341\] ; 0+d69 <[^>]+>
+0[0-9a-f]+ <[^>]+> f93f 12aa ldrsh\.w r1, \[pc, #-682\] ; 0+96e <[^>]+>
+0[0-9a-f]+ <[^>]+> f93f 1155 ldrsh\.w r1, \[pc, #-341\] ; 0+ac7 <[^>]+>
+0[0-9a-f]+ <[^>]+> f8df 12aa ldr\.w r1, \[pc, #682\] ; 0+eca <[^>]+>
+0[0-9a-f]+ <[^>]+> f8df 1155 ldr\.w r1, \[pc, #341\] ; 0+d79 <[^>]+>
+0[0-9a-f]+ <[^>]+> f85f 12aa ldr\.w r1, \[pc, #-682\] ; 0+97e <[^>]+>
+0[0-9a-f]+ <[^>]+> f85f 1155 ldr\.w r1, \[pc, #-341\] ; 0+ad7 <[^>]+>
0[0-9a-f]+ <[^>]+> f200 0900 addw r9, r0, #0
0[0-9a-f]+ <[^>]+> f60f 76ff addw r6, pc, #4095 ; 0xfff
0[0-9a-f]+ <[^>]+> f6a9 2685 subw r6, r9, #2693 ; 0xa85
[^;]*: Assembler messages:
-[^;]*:448: Warning: s suffix on comparison instruction is deprecated
-[^;]*:448: Warning: s suffix on comparison instruction is deprecated
-[^;]*:448: Warning: s suffix on comparison instruction is deprecated
-[^;]*:448: Warning: s suffix on comparison instruction is deprecated
-[^;]*:449: Warning: s suffix on comparison instruction is deprecated
-[^;]*:449: Warning: s suffix on comparison instruction is deprecated
-[^;]*:449: Warning: s suffix on comparison instruction is deprecated
-[^;]*:449: Warning: s suffix on comparison instruction is deprecated
-[^;]*:450: Warning: s suffix on comparison instruction is deprecated
-[^;]*:450: Warning: s suffix on comparison instruction is deprecated
-[^;]*:450: Warning: s suffix on comparison instruction is deprecated
-[^;]*:450: Warning: s suffix on comparison instruction is deprecated
[^;]*:451: Warning: s suffix on comparison instruction is deprecated
[^;]*:451: Warning: s suffix on comparison instruction is deprecated
[^;]*:451: Warning: s suffix on comparison instruction is deprecated
[^;]*:451: Warning: s suffix on comparison instruction is deprecated
+[^;]*:452: Warning: s suffix on comparison instruction is deprecated
+[^;]*:452: Warning: s suffix on comparison instruction is deprecated
+[^;]*:452: Warning: s suffix on comparison instruction is deprecated
+[^;]*:452: Warning: s suffix on comparison instruction is deprecated
+[^;]*:453: Warning: s suffix on comparison instruction is deprecated
+[^;]*:453: Warning: s suffix on comparison instruction is deprecated
+[^;]*:453: Warning: s suffix on comparison instruction is deprecated
+[^;]*:453: Warning: s suffix on comparison instruction is deprecated
+[^;]*:454: Warning: s suffix on comparison instruction is deprecated
+[^;]*:454: Warning: s suffix on comparison instruction is deprecated
+[^;]*:454: Warning: s suffix on comparison instruction is deprecated
+[^;]*:454: Warning: s suffix on comparison instruction is deprecated
%H print a 16-bit immediate from hw2[3:0],hw1[11:0]
%S print a possibly-shifted Rm
+ %L print address for a ldrd/strd instruction
%a print the address of a plain load/store
%w print the width and signedness of a core load/store
%m print register mask for ldm/stm
{ARM_EXT_V6T2, 0xe9100000, 0xffd00000, "ldmdb%c\t%16-19r%21'!, %m"},
{ARM_EXT_V6T2, 0xe9c00000, 0xffd000ff, "strd%c\t%12-15r, %8-11r, [%16-19r]"},
{ARM_EXT_V6T2, 0xe9d00000, 0xffd000ff, "ldrd%c\t%12-15r, %8-11r, [%16-19r]"},
- {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"},
- {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"},
- {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"},
- {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"},
+ {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
+ {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
+ {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
+ {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
{ARM_EXT_V6T2, 0xf8000000, 0xff100000, "str%w%c.w\t%12-15r, %a"},
{ARM_EXT_V6T2, 0xf8100000, 0xfe100000, "ldr%w%c.w\t%12-15r, %a"},
}
break;
+ case 'L':
+ /* PR binutils/12534
+ If we have a PC relative offset in an LDRD or STRD
+ instructions then display the decoded address. */
+ if (((given >> 16) & 0xf) == 0xf)
+ {
+ bfd_vma offset = (given & 0xff) * 4;
+
+ if ((given & (1 << 23)) == 0)
+ offset = - offset;
+ func (stream, "\t; ");
+ info->print_address_func ((pc & ~3) + 4 + offset, info);
+ }
+ break;
+
default:
abort ();
}