ARM: at91: dt: rm9200: add spi support
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mon, 17 Jun 2013 12:38:27 +0000 (14:38 +0200)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Wed, 26 Jun 2013 08:13:14 +0000 (10:13 +0200)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/at91rm9200.dtsi

index b91cf78..1fc645e 100644 (file)
                                        };
                                };
 
+                               spi0 {
+                                       pinctrl_spi0: spi0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A SPI0_MISO pin */
+                                                        AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A SPI0_MOSI pin */
+                                                        AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A SPI0_SPCK pin */
+                                       };
+                               };
+
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
                                interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
                                status = "disabled";
                        };
+
+                       spi0: spi@fffe0000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91rm9200-spi";
+                               reg = <0xfffe0000 0x200>;
+                               interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_spi0>;
+                               status = "disabled";
+                       };
                };
 
                nand0: nand@40000000 {