};
+#ifdef CONFIG_AMLOGIC_LCD
+struct work_struct aml_lcd_vlock_param_work;
+#endif
+
static struct amvecm_dev_s amvecm_dev;
spinlock_t vpp_lcd_gamma_lock;
ret = aml_lcd_notifier_register(&aml_lcd_gamma_nb);
if (ret)
pr_info("register aml_lcd_gamma_notifier failed\n");
+
+ INIT_WORK(&aml_lcd_vlock_param_work, vlock_lcd_param_work);
#endif
/* #if (MESON_CPU_TYPE == MESON_CPU_TYPE_MESONG9TV) */
if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu()
unregister_chrdev_region(devp->devno, 1);
#ifdef CONFIG_AMLOGIC_LCD
aml_lcd_notifier_unregister(&aml_lcd_gamma_nb);
+ cancel_work_sync(&aml_lcd_vlock_param_work);
#endif
probe_ok = 0;
pr_info("[amvecm.] : amvecm_exit.\n");
}
EXPORT_SYMBOL(vdin_vlock_input_sel);
-void vlock_param_config(struct device_node *node)
-{
#ifdef CONFIG_AMLOGIC_LCD
+#define VLOCK_LCD_RETRY_MAX 100
+void vlock_lcd_param_work(struct work_struct *p_work)
+{
unsigned int param[LCD_VLOCK_PARAM_NUM] = {0};
+ int i = 0;
+
+ while (i++ < VLOCK_LCD_RETRY_MAX) {
+ aml_lcd_notifier_call_chain(LCD_EVENT_VLOCK_PARAM, ¶m);
+ if (param[0] & LCD_VLOCK_PARAM_BIT_UPDATE) {
+ if (param[0] & LCD_VLOCK_PARAM_BIT_VALID) {
+ vlock_en = param[1];
+ vlock_mode = param[2];
+ vlock_pll_m_limit = param[3];
+ vlock_line_limit = param[4];
+
+ if (vlock_mode &
+ VLOCK_MODE_MANUAL_MIX_PLL_ENC) {
+ vlock_mode &=
+ ~VLOCK_MODE_MANUAL_MIX_PLL_ENC;
+ vlock_mode |= VLOCK_MODE_MANUAL_PLL;
+ }
+ }
+ break;
+ }
+ msleep(20);
+ }
+}
#endif
+
+void vlock_param_config(struct device_node *node)
+{
unsigned int val;
int ret;
vlock_line_limit = val;
#ifdef CONFIG_AMLOGIC_LCD
- aml_lcd_notifier_call_chain(LCD_EVENT_VLOCK_PARAM, ¶m);
- if (param[0]) { /* lcd vlock param is valid */
- vlock_en = param[1];
- vlock_mode = param[2];
- vlock_pll_m_limit = param[3];
- vlock_line_limit = param[4];
- }
+ schedule_work(&aml_lcd_vlock_param_work);
#endif
if (vlock_mode & VLOCK_MODE_MANUAL_MIX_PLL_ENC) {
extern void vdin_vlock_input_sel(unsigned int type,
enum vframe_source_type_e source_type);
extern void vlock_param_config(struct device_node *node);
+#ifdef CONFIG_AMLOGIC_LCD
+extern struct work_struct aml_lcd_vlock_param_work;
+extern void vlock_lcd_param_work(struct work_struct *p_work);
+#endif
#endif
unsigned int para[4];
int ret;
+ pconf->lcd_control.vlock_param[0] = LCD_VLOCK_PARAM_BIT_UPDATE;
+
ret = of_property_read_u32_array(child, "vlock_attr", ¶[0], 4);
- if (ret) {
- pconf->lcd_control.vlock_param[0] = 0;
- } else {
+ if (ret == 0) {
LCDPR("find vlock_attr\n");
- pconf->lcd_control.vlock_param[0] = 1; /* vlock_param valid */
+ pconf->lcd_control.vlock_param[0] |= LCD_VLOCK_PARAM_BIT_VALID;
pconf->lcd_control.vlock_param[1] = para[0];
pconf->lcd_control.vlock_param[2] = para[1];
pconf->lcd_control.vlock_param[3] = para[2];
p = buf;
- pconf->lcd_control.vlock_param[0] = 0;
+ pconf->lcd_control.vlock_param[0] = LCD_VLOCK_PARAM_BIT_UPDATE;
pconf->lcd_control.vlock_param[1] = *(p + LCD_UKEY_VLOCK_VAL_0);
pconf->lcd_control.vlock_param[2] = *(p + LCD_UKEY_VLOCK_VAL_1);
pconf->lcd_control.vlock_param[3] = *(p + LCD_UKEY_VLOCK_VAL_2);
pconf->lcd_control.vlock_param[3] ||
pconf->lcd_control.vlock_param[4]) {
LCDPR("find vlock_attr\n");
- pconf->lcd_control.vlock_param[0] = 1;
+ pconf->lcd_control.vlock_param[0] |= LCD_VLOCK_PARAM_BIT_VALID;
}
return 0;
#define LCD_EVENT_TEST_PATTERN (1 << 14)
#define LCD_VLOCK_PARAM_NUM 5
+#define LCD_VLOCK_PARAM_BIT_UPDATE (1 << 4)
+#define LCD_VLOCK_PARAM_BIT_VALID (1 << 0)
#define LCD_EVENT_VLOCK_PARAM (1 << 16)