ARM: dts: Disable Exynos5250 I2S controllers by default
authorMark Brown <broonie@linaro.org>
Mon, 7 Oct 2013 14:13:47 +0000 (23:13 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Mon, 7 Oct 2013 14:13:47 +0000 (23:13 +0900)
Rather than requiring each board to explicitly disable the I2S controllers
it is not using instead require boards to enable those that they are using.

This is required for audio operation on Arndale, one of the unused I2S
controllers is pinmuxed with the LDO enable GPIOs for the WM1811A.

Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos5250-arndale.dts
arch/arm/boot/dts/exynos5250-smdk5250.dts
arch/arm/boot/dts/exynos5250.dtsi

index 0c42547..b0dbea8 100644 (file)
                status = "disabled";
        };
 
+       i2s0: i2s@03830000 {
+               status = "okay";
+       };
+
        spi_0: spi@12d20000 {
                status = "disabled";
        };
index 2538b32..f86d567 100644 (file)
                status = "okay";
        };
 
-       i2s1: i2s@12D60000 {
-               status = "disabled";
-       };
-
-       i2s2: i2s@12D70000 {
-               status = "disabled";
-       };
-
        sound {
                compatible = "samsung,smdk-wm8994";
 
index 7d7cc77..c863113 100644 (file)
 
        i2s0: i2s@03830000 {
                compatible = "samsung,s5pv210-i2s";
+               status = "disabled";
                reg = <0x03830000 0x100>;
                dmas = <&pdma0 10
                        &pdma0 9
 
        i2s1: i2s@12D60000 {
                compatible = "samsung,s3c6410-i2s";
+               status = "disabled";
                reg = <0x12D60000 0x100>;
                dmas = <&pdma1 12
                        &pdma1 11>;
 
        i2s2: i2s@12D70000 {
                compatible = "samsung,s3c6410-i2s";
+               status = "disabled";
                reg = <0x12D70000 0x100>;
                dmas = <&pdma0 12
                        &pdma0 11>;